/drivers/regulator/ |
H A D | max8997.c | 184 int *reg, int *mask, int *pattern) 191 *mask = 0xC0; 196 *mask = 0x01; 201 *mask = 0x01; 206 *mask = 0x01; 211 *mask = 0x01; 216 *mask = 0x01; 221 *mask = 0x01; 226 *mask = 0x01; 231 *mask 183 max8997_get_enable_register(struct regulator_dev *rdev, int *reg, int *mask, int *pattern) argument 261 int ret, reg, mask, pattern; local 279 int ret, reg, mask, pattern; local 292 int ret, reg, mask, pattern; local 306 int reg, shift = 0, mask = 0x3f; local 371 int reg, shift, mask, ret; local 418 int reg, shift = 0, mask, ret = 0; local 473 int i, reg, shift, mask, ret; local 714 int reg, shift = 0, mask, ret; local 730 int ret, reg, mask, pattern; local [all...] |
H A D | lp3972.c | 68 /* LDO output enable mask */ 206 static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val) argument 214 tmp = (tmp & ~mask) | val; 229 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); local 233 return !!(val & mask); 240 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); local 243 mask, mask); 250 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); local 253 mask, 260 u16 mask = LP3972_LDO_VOL_MASK(ldo); local 322 u16 mask = 1 << (buck * 2); local 333 u16 mask = 1 << (buck * 2); local 345 u16 mask = 1 << (buck * 2); local [all...] |
H A D | tps6507x-regulator.c | 140 static int tps6507x_pmic_set_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask) argument 153 data |= mask; 163 static int tps6507x_pmic_clear_bits(struct tps6507x_pmic *tps, u8 reg, u8 mask) argument 176 data &= ~mask; 263 u8 reg, mask; local 268 mask = TPS6507X_DEFDCDCX_DCDC_MASK; 275 mask = TPS6507X_DEFDCDCX_DCDC_MASK; 282 mask = TPS6507X_DEFDCDCX_DCDC_MASK; 286 mask = TPS6507X_REG_LDO_CTRL1_LDO1_MASK; 290 mask 309 u8 reg, mask; local [all...] |
/drivers/pinctrl/spear/ |
H A D | pinctrl-spear3xx.c | 26 .mask = PMX_FIRDA_MASK, 59 .mask = PMX_I2C_MASK, 92 .mask = PMX_SSP_CS_MASK, 125 .mask = PMX_SSP_MASK, 159 .mask = PMX_MII_MASK, 192 .mask = PMX_GPIO_PIN0_MASK, 218 .mask = PMX_GPIO_PIN1_MASK, 244 .mask = PMX_GPIO_PIN2_MASK, 270 .mask = PMX_GPIO_PIN3_MASK, 296 .mask [all...] |
/drivers/clk/sunxi/ |
H A D | clk-sun6i-apb0-gates.c | 21 DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE); 25 .mask = {0x7F}, 29 .mask = {0x5D}, 75 ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE); 81 for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
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/drivers/net/phy/ |
H A D | mdio-mux-mmioreg.c | 24 uint8_t mask; member in struct:mdio_mux_mmioreg_state 34 * s->mask). 57 y = (x & ~s->mask) | desired_child; 59 iowrite8((x & ~s->mask) | desired_child, p); 96 iprop = of_get_property(np, "mux-mask", &len); 98 dev_err(&pdev->dev, "missing or invalid mux-mask property\n"); 105 s->mask = be32_to_cpup(iprop); 109 * set any bits outside of the 'mask'. 118 if (be32_to_cpup(iprop) & ~s->mask) {
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/drivers/staging/lustre/include/linux/libcfs/linux/ |
H A D | libcfs.h | 104 #define __CHECK_STACK(msgdata, mask, cdls) \ 112 (msgdata)->msg_mask = mask; \ 118 #define CFS_CHECK_STACK(msgdata, mask, cdls) __CHECK_STACK(msgdata, mask, cdls) 120 #define CFS_CHECK_STACK(msgdata, mask, cdls) do {} while (0)
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/drivers/gpu/drm/nouveau/core/engine/disp/ |
H A D | outpdp.c | 151 DBG("HPD: %d\n", line->mask); 154 if (line->mask & NVKM_I2C_UNPLUG) 155 rep.mask |= NVIF_NOTIFY_CONN_V0_UNPLUG; 156 if (line->mask & NVKM_I2C_PLUG) 157 rep.mask |= NVIF_NOTIFY_CONN_V0_PLUG; 159 nvkm_event_send(&disp->hpd, rep.mask, conn->index, 176 .mask = NVIF_NOTIFY_CONN_V0_IRQ, 180 DBG("IRQ: %d\n", line->mask); 183 nvkm_event_send(&disp->hpd, rep.mask, index, &rep, sizeof(rep)); 259 .mask [all...] |
/drivers/irqchip/ |
H A D | spear-shirq.c | 35 * mask: Mask to apply to the status register 46 u32 mask; member in struct:spear_shirq 92 .mask = ((0x1 << 9) - 1) << 0, 108 .mask = ((0x1 << 8) - 1) << 0, 116 .mask = ((0x1 << 5) - 1) << 8, 124 .mask = ((0x1 << 1) - 1) << 13, 132 .mask = ((0x1 << 3) - 1) << 14, 152 .mask = ((0x1 << 7) - 1) << 0, 158 .mask = ((0x1 << 3) - 1) << 7, 166 .mask [all...] |
/drivers/mfd/ |
H A D | rk808.c | 28 int mask; member in struct:rk808_reg_data 99 .mask = RK808_IRQ_VOUT_LO_MSK, 103 .mask = RK808_IRQ_VB_LO_MSK, 107 .mask = RK808_IRQ_PWRON_MSK, 111 .mask = RK808_IRQ_PWRON_LP_MSK, 115 .mask = RK808_IRQ_HOTDIE_MSK, 119 .mask = RK808_IRQ_RTC_ALARM_MSK, 123 .mask = RK808_IRQ_RTC_PERIOD_MSK, 129 .mask = RK808_IRQ_PLUG_IN_INT_MSK, 133 .mask [all...] |
H A D | ucb1x00-core.c | 159 unsigned old, mask = 1 << offset; local 164 ucb->io_out |= mask; 166 ucb->io_out &= ~mask; 172 if (!(ucb->io_dir & mask)) { 173 ucb->io_dir |= mask; 227 * @adc_channel: ADC channel mask 301 static void ucb1x00_irq_update(struct ucb1x00 *ucb, unsigned mask) argument 304 if (ucb->irq_ris_enbl & mask) 307 if (ucb->irq_fal_enbl & mask) 320 unsigned mask local 331 unsigned mask = 1 << (data->irq - ucb->irq_base); local 342 unsigned mask = 1 << (data->irq - ucb->irq_base); local 369 unsigned mask = 1 << (data->irq - ucb->irq_base); local 446 unsigned long mask; local [all...] |
/drivers/video/fbdev/matrox/ |
H A D | i2c-matroxfb.c | 50 static void matroxfb_set_gpio(struct matrox_fb_info* minfo, int mask, int val) { argument 55 v = (matroxfb_DAC_in(minfo, DAC_XGENIOCTRL) & mask) | val; 63 static inline void matroxfb_i2c_set(struct matrox_fb_info* minfo, int mask, int state) { argument 67 state = mask; 68 matroxfb_set_gpio(minfo, ~mask, state); 73 matroxfb_i2c_set(b->minfo, b->mask.data, state); 78 matroxfb_i2c_set(b->minfo, b->mask.clock, state); 83 return (matroxfb_read_gpio(b->minfo) & b->mask.data) ? 1 : 0; 88 return (matroxfb_read_gpio(b->minfo) & b->mask.clock) ? 1 : 0; 108 b->mask [all...] |
/drivers/clk/ |
H A D | clk-max-gen.c | 36 u32 mask; member in struct:max_gen_clk 51 max_gen->mask, max_gen->mask); 59 max_gen->mask, ~max_gen->mask); 73 return val & max_gen->mask; 130 max_gen_clks[i].mask = 1 << i;
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/drivers/infiniband/hw/mlx5/ |
H A D | mem.c | 53 int mask; local 64 mask = skip - 1; 70 if (!(i & mask)) { 74 mask = skip - 1; 82 mask = skip - 1; 116 int mask = (1 << shift) - 1; local 129 if (!(i & mask)) {
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/drivers/leds/ |
H A D | leds-lp8788.c | 52 u8 addr, mask, val; local 65 mask = 1 << (cfg->num + LP8788_ISINK_SCALE_OFFSET); 67 ret = lp8788_update_bits(led->lp, addr, mask, val); 73 mask = lp8788_iout_mask[cfg->num]; 76 return lp8788_update_bits(led->lp, addr, mask, val); 82 u8 mask = 1 << num; local 85 if (lp8788_update_bits(led->lp, LP8788_ISINK_CTRL, mask, val))
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H A D | leds-max8997.c | 57 u8 mask = 0, val; local 61 mask = MAX8997_LED1_FLASH_MASK | MAX8997_LED0_FLASH_MASK; 67 mask = MAX8997_LED1_MOVIE_MASK | MAX8997_LED0_MOVIE_MASK; 73 mask = MAX8997_LED1_FLASH_PIN_MASK | 80 mask = MAX8997_LED1_MOVIE_PIN_MASK | 91 if (mask) { 93 mask); 106 u8 val = 0, mask = MAX8997_LED_BOOST_ENABLE_MASK; local 113 ret = max8997_update_reg(client, MAX8997_REG_BOOST_CNTL, val, mask); 126 u8 val = 0, mask local [all...] |
/drivers/net/ethernet/ti/ |
H A D | cpsw-phy-sel.c | 47 u32 mask; local 70 mask = GMII_SEL_MODE_MASK << (slave * 2) | BIT(slave + 6); 80 reg &= ~mask; 90 u32 mask; local 115 mask = GMII_SEL_MODE_MASK; 118 mask = GMII_SEL_MODE_MASK << 4; 129 reg &= ~mask;
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/drivers/iio/gyro/ |
H A D | st_gyro_core.c | 116 .mask = ST_GYRO_1_ODR_MASK, 126 .mask = ST_GYRO_1_PW_MASK, 132 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 136 .mask = ST_GYRO_1_FS_MASK, 157 .mask = ST_GYRO_1_BDU_MASK, 178 .mask = ST_GYRO_2_ODR_MASK, 188 .mask = ST_GYRO_2_PW_MASK, 194 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 198 .mask = ST_GYRO_2_FS_MASK, 219 .mask 230 st_gyro_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *ch, int *val, int *val2, long mask) argument 259 st_gyro_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument [all...] |
/drivers/video/backlight/ |
H A D | lm3533_bl.c | 97 u8 mask; local 105 mask = 1 << (2 * ctrlbank); 106 enable = val & mask; 119 u8 mask; local 125 mask = 1 << (2 * ctrlbank); 128 val = mask; 133 mask); 145 u8 mask; local 153 mask = 1 << (2 * lm3533_bl_get_ctrlbank_id(bl) + 1); 155 if (val & mask) 169 u8 mask; local [all...] |
/drivers/iio/accel/ |
H A D | st_accel_core.c | 177 .mask = ST_ACCEL_1_ODR_MASK, 191 .mask = ST_ACCEL_1_ODR_MASK, 196 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 200 .mask = ST_ACCEL_1_FS_MASK, 226 .mask = ST_ACCEL_1_BDU_MASK, 247 .mask = ST_ACCEL_2_ODR_MASK, 257 .mask = ST_ACCEL_2_PW_MASK, 263 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 267 .mask = ST_ACCEL_2_FS_MASK, 288 .mask 378 st_accel_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *ch, int *val, int *val2, long mask) argument 407 st_accel_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument [all...] |
/drivers/staging/comedi/drivers/ |
H A D | ni_6527.c | 178 unsigned int mask; local 180 mask = comedi_dio_update_state(s, data); 181 if (mask) { 185 if (mask & 0x0000ff) 187 if (mask & 0x00ff00) 190 if (mask & 0xff0000) 288 unsigned int mask, 294 rising &= mask; 295 falling &= mask; 297 if (mask 287 ni6527_set_edge_detection(struct comedi_device *dev, unsigned int mask, unsigned int rising, unsigned int falling) argument 326 unsigned int mask = 0xffffffff; local [all...] |
/drivers/pinctrl/samsung/ |
H A D | pinctrl-s3c24xx.c | 150 u32 mask; local 156 mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; 161 val &= ~(mask << shift); 272 unsigned long mask; local 274 mask = readl(d->virt_base + EINTMASK_REG); 275 mask |= (1UL << data->hwirq); 276 writel(mask, d->virt_base + EINTMASK_REG); 283 unsigned long mask; local 285 mask = readl(d->virt_base + EINTMASK_REG); 286 mask 333 unsigned long mask; local 345 unsigned long mask; local 366 unsigned int pend, mask; local 524 unsigned int mask; local [all...] |
/drivers/gpu/drm/radeon/ |
H A D | radeon_acpi.c | 43 u32 notification_mask; /* supported notifications mask */ 49 u32 valid_mask; /* valid flags mask */ 82 u16 valid_flags_mask; /* valid flags mask */ 146 * @mask: supported notifications mask from ATIF 148 * Use the supported notifications mask from ATIF function 152 static void radeon_atif_parse_notification(struct radeon_atif_notifications *n, u32 mask) argument 154 n->display_switch = mask & ATIF_DISPLAY_SWITCH_REQUEST_SUPPORTED; 155 n->expansion_mode_change = mask & ATIF_EXPANSION_MODE_CHANGE_REQUEST_SUPPORTED; 156 n->thermal_state = mask 175 radeon_atif_parse_functions(struct radeon_atif_functions *f, u32 mask) argument 467 radeon_atcs_parse_functions(struct radeon_atcs_functions *f, u32 mask) argument [all...] |
/drivers/ide/ |
H A D | ide-dma.c | 244 unsigned int mask = 0; local 250 mask = id[ATA_ID_UDMA_MODES]; 252 mask &= port_ops->udma_filter(drive); 254 mask &= hwif->ultra_mask; 260 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) 261 mask &= 0x07; 265 mask = id[ATA_ID_MWDMA_MODES]; 271 mask |= ((2 << mode) - 1) << 3; 275 mask &= port_ops->mdma_filter(drive); 277 mask 316 unsigned int mask; local [all...] |
/drivers/gpio/ |
H A D | gpio-cs5535.c | 24 * 31-29,23 : reserved (always mask out) 36 * If a mask was not specified, allow all except 41 static ulong mask = GPIO_DEFAULT_MASK; variable 42 module_param_named(mask, mask, ulong, 0444); 43 MODULE_PARM_DESC(mask, "GPIO channel mask."); 211 if ((mask & (1 << offset)) == 0) { 213 "pin %u is not available (check mask)\n", offset); 310 ulong mask_orig = mask; [all...] |