Searched refs:membase (Results 51 - 75 of 157) sorted by relevance

1234567

/drivers/tty/serial/8250/
H A D8250_hp300.c123 port.membase = (char *)(port.mapbase + DIO_VIRADDRBASE);
140 port.membase = (char *)(port.mapbase + DIO_VIRADDRBASE);
182 uart.port.membase = (char *)(uart.port.mapbase + DIO_VIRADDRBASE);
263 uart.port.membase = (char *)(base + DIO_VIRADDRBASE);
H A D8250_mtk.c166 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
168 if (!uart.port.membase)
195 writel(0x0, uart.port.membase +
H A D8250_acorn.c74 uart.port.membase = info->vaddr + type->offset[i];
/drivers/net/irda/
H A Dsh_irda.c143 void __iomem *membase; member in struct:sh_irda_self
173 iowrite16(data, self->membase + offset);
183 ret = ioread16(self->membase + offset);
196 old = ioread16(self->membase + offset);
199 iowrite16(data, self->membase + offset);
610 self->tx_buff.head = self->membase + IRDARAM;
776 self->membase = ioremap_nocache(res->start, resource_size(res));
777 if (!self->membase) {
821 iounmap(self->membase);
839 iounmap(self->membase);
[all...]
H A Dsh_sir.c107 void __iomem *membase; member in struct:sh_sir_self
129 iowrite16(data, self->membase + offset);
134 return ioread16(self->membase + offset);
725 self->membase = ioremap_nocache(res->start, resource_size(res));
726 if (!self->membase) {
775 iounmap(self->membase);
793 iounmap(self->membase);
/drivers/tty/serial/
H A Dbcm63xx_uart.c83 return __raw_readl(port->membase + offset);
89 __raw_writel(value, port->membase + offset);
599 port->membase = ioremap(port->mapbase, size);
600 if (!port->membase) {
614 iounmap(port->membase);
757 if (!port->membase)
816 if (ports[pdev->id].membase)
846 ports[pdev->id].membase = 0;
860 ports[pdev->id].membase = 0;
H A Dvt8500_serial.c127 writel(val, port->membase + off);
132 return readl(port->membase + off);
182 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff;
210 writeb(port->x_char, port->membase + VT8500_TXFIFO);
223 writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);
505 writeb(c, port->membase + VT8500_TXFIFO);
685 vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres);
686 if (IS_ERR(vt8500_port->uart.membase))
687 return PTR_ERR(vt8500_port->uart.membase);
H A Daltera_uart.c90 return readl(port->membase + (reg << port->regshift));
95 writel(dat, port->membase + (reg << port->regshift));
334 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
350 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
439 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
461 if (!port->membase)
578 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
579 if (!port->membase)
H A Datmel_serial.c91 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
92 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
93 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
94 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
95 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
96 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
97 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
98 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
99 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
100 #define UART_GET_BRGR(port) __raw_readl((port)->membase
[all...]
H A Dearlycon.c138 port->membase = earlycon_map(port->mapbase, 64);
160 port->membase = earlycon_map(addr, SZ_4K);
H A Dst-asc.c155 return readl_relaxed(port->membase + offset);
157 return readl(port->membase + offset);
164 writel_relaxed(value, port->membase + offset);
166 writel(value, port->membase + offset);
679 port->membase = devm_ioremap_resource(&pdev->dev, res);
680 if (IS_ERR(port->membase))
681 return PTR_ERR(port->membase);
853 if (ascport->port.mapbase == 0 || ascport->port.membase == NULL)
H A Duartlite.c99 return reg_ops->in(port->membase + offset);
106 reg_ops->out(val, port->membase + offset);
321 iounmap(port->membase);
322 port->membase = NULL;
337 port->membase = ioremap(port->mapbase, ULITE_REGION);
338 if (!port->membase) {
491 if (!port->membase) {
579 port->membase = NULL;
H A Dapbuart.h45 #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
H A Dmsm_serial.c135 ioread32_rep(port->membase + UARTDM_RF, buf, 1);
223 tf = port->membase + UARTDM_TF;
225 tf = port->membase + UART_TF;
611 iounmap(port->membase);
612 port->membase = NULL;
631 port->membase = ioremap(port->mapbase, size);
632 if (!port->membase) {
857 tf = port->membase + UARTDM_TF;
859 tf = port->membase + UART_TF;
932 if (unlikely(!port->membase))
[all...]
H A Darc_uart.c12 * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
75 #define RBASE(port, reg) (port->membase + reg)
507 if (!port->membase)
566 if (!dev->port.membase)
615 port->membase = of_iomap(np, 0);
616 if (!port->membase)
H A Dsb1250-duart.c127 void __iomem *csr = sport->port.membase + reg;
141 void __iomem *csr = sport->port.membase + reg;
661 iounmap(uport->membase);
662 uport->membase = NULL;
676 if (!uport->membase)
677 uport->membase = ioremap_nocache(uport->mapbase,
679 if (!uport->membase) {
689 iounmap(uport->membase);
690 uport->membase = NULL;
H A Dvr41xx_siu.c72 #define siu_read(port, offset) readb((port)->membase + (offset))
73 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
451 if (port->membase == NULL)
633 iounmap(port->membase);
634 port->membase = NULL;
652 port->membase = ioremap(port->mapbase, size);
653 if (port->membase == NULL) {
797 if (port->membase == NULL) {
800 port->membase = ioremap(port->mapbase, siu_port_size(port));
H A Dserial_txx9.c177 return __raw_readl(up->port.membase + offset);
188 __raw_writel(value, up->port.membase + offset);
769 up->port.membase = ioremap(up->port.mapbase, size);
770 if (!up->port.membase) {
795 iounmap(up->port.membase);
796 up->port.membase = NULL;
1044 uart->port.membase = port->membase;
1078 uart->port.membase = NULL;
1095 port.membase
[all...]
/drivers/net/ethernet/8390/
H A Dmac8390.c238 static enum mac8390_access __init mac8390_testio(volatile unsigned long membase) argument
243 memcpy_toio(membase, &outdata, 4);
245 if (memcmp_withio(&outdata, membase, 4) == 0)
248 word_memcpy_tocard(membase, &outdata, 4);
250 word_memcpy_fromcard(&indata, membase, 4);
256 static int __init mac8390_memsize(unsigned long membase) argument
264 volatile unsigned short *m = (unsigned short *)(membase + (i * 0x1000));
279 volatile unsigned short *p = (unsigned short *)(membase + (j * 0x1000));
/drivers/firmware/efi/libstub/
H A Defi-stub-helper.c117 unsigned long membase = EFI_ERROR; local
124 return membase;
130 if (membase > md->phys_addr)
131 membase = md->phys_addr;
135 return membase;
/drivers/spi/
H A Dspi-txx9.c80 void __iomem *membase; member in struct:txx9spi
89 return __raw_readl(c->membase + reg);
93 __raw_writel(val, c->membase + reg);
360 c->membase = devm_ioremap_resource(&dev->dev, res);
361 if (IS_ERR(c->membase))
/drivers/dma/
H A Dpch_dma.c104 void __iomem *membase; member in struct:pch_dma_chan
123 readl((pdc)->membase + PDC_##name)
125 writel((val), (pdc)->membase + PDC_##name)
129 void __iomem *membase; member in struct:pch_dma
145 readl((pd)->membase + PCH_DMA_##name)
147 writel((val), (pd)->membase + PCH_DMA_##name)
880 regs = pd->membase = pci_iomap(pdev, 1, 0);
881 if (!pd->membase) {
913 pd_chan->membase = &regs->desc[i];
950 pci_iounmap(pdev, pd->membase);
[all...]
H A Dfsl-edma.c166 void __iomem *membase; member in struct:fsl_edma_engine
231 void __iomem *addr = fsl_chan->edma->membase;
240 void __iomem *addr = fsl_chan->edma->membase;
357 void __iomem *addr = fsl_chan->edma->membase;
432 void __iomem *addr = fsl_chan->edma->membase;
650 base_addr = fsl_edma->membase;
687 err = edma_readl(fsl_edma, fsl_edma->membase + EDMA_ERR);
695 fsl_edma->membase + EDMA_CERR);
859 fsl_edma->membase = devm_ioremap_resource(&pdev->dev, res);
860 if (IS_ERR(fsl_edma->membase))
[all...]
/drivers/i2c/busses/
H A Di2c-cadence.c116 #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
117 #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
121 * @membase: Base address of the I2C device
139 void __iomem *membase; member in struct:cdns_i2c
798 id->membase = devm_ioremap_resource(&pdev->dev, r_mem);
799 if (IS_ERR(id->membase))
800 return PTR_ERR(id->membase);
/drivers/pinctrl/
H A Dpinctrl-lantiq.h70 void __iomem *membase[5]; member in struct:ltq_pinmux_info

Completed in 442 milliseconds

1234567