Searched refs:pulse (Results 26 - 50 of 50) sorted by relevance

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/drivers/media/rc/img-ir/
H A Dimg-ir-hw.h70 * @pulse: Timing range for the length of the pulse in this symbol
74 struct img_ir_timing_range pulse; member in struct:img_ir_symbol_timing
H A Dimg-ir-hw.c73 img_ir_timing_preprocess(&timing->pulse, unit);
105 img_ir_timing_defaults(&timing->pulse, &defaults->pulse);
204 hw_period.min = timing->pulse.min + timing->space.min;
205 hw_period.max = timing->pulse.max + timing->space.max;
208 img_ir_timing_range_convert(&hw_pulse, &timing->pulse,
/drivers/staging/media/lirc/
H A Dlirc_serial.c4 * lirc_serial - Device driver that records pulse- and pause-lengths
36 * - For other system, non-integer-microsecond pulse/space lengths,
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
203 * A long pulse code from a remote might take up to 300 bytes. The
325 * pulse and space widths as clock cycles. As this is CPU speed
356 /* Derive pulse an
567 static int pulse, space; local
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/drivers/media/rc/
H A Drc-loopback.c128 rawir.pulse = i % 2 ? false : true;
135 rawir.pulse = false;
H A Dir-hix5hd2.c178 ev.pulse = true;
183 ev.pulse = false;
H A Dir-lirc-codec.c29 * @duration: the struct ir_raw_event descriptor of the pulse/space
89 sample = ev.pulse ? LIRC_PULSE(ev.duration / 1000) :
92 TO_US(ev.duration), TO_STR(ev.pulse));
H A Dst_rc.c40 #define IRB_RX_ON 0x40 /* pulse time capture */
137 ev.pulse = true;
142 ev.pulse = false;
H A Dredrat3.c237 pr_cont("Initial signal pulse not long enough "
372 /* we should always get pulse/space/pulse/space samples */
374 rawir.pulse = false;
376 rawir.pulse = true;
379 /* Save initial pulse length to fudge trailer */
386 rawir.pulse ? "pulse" : "space", rawir.duration, i);
392 rawir.pulse = false;
H A Dsunxi-cir.c125 rawir.pulse = (dt & 0x80) != 0;
H A Dfintek-cir.c328 rawir.pulse = ((sample & BUF_PULSE_BIT) != 0);
333 rawir.pulse ? "pulse" : "space",
H A Diguanair.c143 rawir.pulse = false;
146 rawir.pulse = (ir->buf_in[i] & 0x80) == 0;
H A Dite-cir.c128 /* get the bits required to program the pulse with in TXMPW */
193 ev.pulse = true;
201 ev.pulse = false;
210 ev.pulse = true;
368 /* set the tx duty cycle by controlling the pulse width */
383 * pulse/space/pulse/space lengths that we should write out completely through
431 ((is_pulse) ? "pulse" : "space"),
435 /* repeat while the pulse is non-zero length */
455 /* take into account pulse/spac
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H A Dnuvoton-cir.c608 * We get IR data samples one byte at a time. If the msb is set, its a pulse,
610 * (default 50us) intervals for that pulse/space. A discrete signal is
634 rawir.pulse = ((sample & BUF_PULSE_BIT) != 0);
639 rawir.pulse ? "pulse" : "space", rawir.duration);
H A Dwinbond-cir.c396 rawir.pulse = irdata & 0x80 ? false : true;
399 if (rawir.pulse)
437 * Y = space (1) or pulse (0)
448 byte |= (data->txoff % 2 ? 0x80 : 0x00); /* pulse/space */
969 /* Set TX modulation, 36kHz, 7us pulse width */
H A Dmceusb.c69 #define MCE_MAX_PULSE_LENGTH 0x7f /* Longest transmittable pulse symbol */
671 dev_dbg(dev, "RX pulse count: %d",
697 dev_dbg(dev, "Raw IR data, %d pulse/space samples", ir->rem);
1008 rawir.pulse = ((ir->buf_in[i] & MCE_PULSE_BIT) != 0);
1013 rawir.pulse ? "pulse" : "space",
/drivers/clk/sirf/
H A Dclk-atlas6.c65 spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1, enumerator in enum:atlas6_clk_index
H A Dclk-prima2.c64 spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1, enumerator in enum:prima2_clk_index
/drivers/media/usb/dvb-usb/
H A Dtechnisat-usb2.c639 ev.pulse = 0;
641 ev.pulse = !ev.pulse;
647 ev.pulse = 0;
/drivers/media/pci/cx88/
H A Dcx88-input.c540 * represents a pulse.
549 ev.pulse = samples & 0x80000000 ? false : true;
550 bits = min(todo, 32U - fls(ev.pulse ? samples : ~samples));
/drivers/sn/
H A Dioc3.c35 static inline unsigned mcr_pack(unsigned pulse, unsigned sample) argument
37 return (pulse << 10) | (sample << 2);
/drivers/net/ethernet/sgi/
H A Dioc3-eth.c224 static inline u32 mcr_pack(u32 pulse, u32 sample) argument
226 return (pulse << 10) | (sample << 2);
/drivers/media/i2c/cx25840/
H A Dcx25840-ir.c227 * FIFO register pulse width count computations
233 * of the pulse width counter as read from the FIFO. The two lsb's are
246 * The 2 lsb's of the pulse width timer count are not readable, hence
265 * The 2 lsb's of the pulse width timer count are not accessible, hence
288 * The 2 lsb's of the pulse width timer count are not readable, hence
301 * The total pulse clock count is an 18 bit pulse width timer count as the most
303 * When the Rx clock divider ticks down to 0, it increments the 18 bit pulse
710 p->ir_core_data.pulse = u;
1085 v4l2_info(sd, "\tFIFO data on pulse time
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/drivers/media/pci/cx23885/
H A Dcx23888-ir.c261 * FIFO register pulse width count computations
267 * of the pulse width counter as read from the FIFO. The two lsb's are
280 * The 2 lsb's of the pulse width timer count are not readable, hence
296 * The 2 lsb's of the pulse width timer count are not readable, hence
309 * The total pulse clock count is an 18 bit pulse width timer count as the most
311 * When the Rx clock divider ticks down to 0, it increments the 18 bit pulse
700 p->ir_core_data.pulse = u;
987 v4l2_info(sd, "\tFIFO data on pulse timer overflow: %s\n",
1023 v4l2_info(sd, "\tMax measurable pulse widt
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/drivers/input/misc/
H A DKconfig373 which can be instructed to pulse or to switch to a particular intensity.
/drivers/media/usb/dvb-usb-v2/
H A Drtl28xxu.c1404 ev.pulse = buf[i] >> 7;

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