/drivers/media/platform/davinci/ |
H A D | isif.c | 549 struct vpss_sync_pol sync; local 572 * Configure the vertical sync polarity(MODESET.VDPOL) 573 * Configure the horizontal sync polarity (MODESET.HDPOL) 693 sync.ccdpg_hdpol = params->hd_pol; 694 sync.ccdpg_vdpol = params->vd_pol; 695 dm365_vpss_set_sync_pol(sync); 895 struct vpss_sync_pol sync; local 922 /* setup BT.656, embedded sync */ 985 sync.ccdpg_hdpol = params->hd_pol; 986 sync [all...] |
/drivers/net/ethernet/qualcomm/ |
H A D | qca_debug.c | 90 (unsigned int)qca->sync); 91 switch (qca->sync) {
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/drivers/staging/lustre/lustre/obdclass/ |
H A D | llog_obd.c | 88 /* sync with llog ctxt user thread */ 222 if (CTXTP(ctxt, sync)) 223 rc = CTXTP(ctxt, sync)(ctxt, exp, flags);
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/drivers/video/fbdev/core/ |
H A D | modedb.c | 511 var->sync = mode->sync; 786 mode->sync = var->sync; 831 var->sync = mode->sync; 855 mode1->sync == mode2->sync &&
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H A D | fbmon.c | 408 mode->sync = 0; 570 mode->sync |= FB_SYNC_HOR_HIGH_ACT; 572 mode->sync |= FB_SYNC_VERT_HIGH_ACT; 914 var->sync |= FB_SYNC_HOR_HIGH_ACT; 916 var->sync |= FB_SYNC_VERT_HIGH_ACT; 1406 fbmode->sync = 0; 1409 fbmode->sync |= FB_SYNC_HOR_HIGH_ACT; 1411 fbmode->sync |= FB_SYNC_VERT_HIGH_ACT; 1441 m->hsync_len, m->vsync_len, m->sync, m->vmode, m->flag);
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/drivers/video/fbdev/ |
H A D | pxa168fb.c | 190 var->sync = mode->sync; 329 static void set_dma_control1(struct pxa168fb_info *fbi, int sync) argument 345 if (!(sync & FB_SYNC_VERT_HIGH_ACT)) 380 x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0; 382 x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008; 383 x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004; 444 set_dma_control1(fbi, info->var.sync);
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H A D | sh_mobile_hdmi.c | 86 #define HDMI_HSYNC_PMENT_AT_EMB_7_0 0x52 /* HSYNC placement at embedded sync (LSB) */ 87 #define HDMI_HSYNC_PMENT_AT_EMB_15_8 0x53 /* HSYNC placement at embedded sync (MSB) */ 88 #define HDMI_VSYNC_PMENT_AT_EMB_7_0 0x54 /* VSYNC placement at embedded sync (LSB) */ 89 #define HDMI_VSYNC_PMENT_AT_EMB_14_8 0x55 /* VSYNC placement at embedded sync (MSB) */ 407 u8 sync = 0; local 430 if (mode->sync & FB_SYNC_HOR_HIGH_ACT) 431 sync |= 4; 432 if (mode->sync & FB_SYNC_VERT_HIGH_ACT) 433 sync |= 8; 435 dev_dbg(hdmi->dev, "H: %u, %u, %u, %u; V: %u, %u, %u, %u; sync [all...] |
H A D | da8xx-fb.c | 212 .sync = FB_SYNC_CLK_INVERT | 227 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 242 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 257 .sync = 0, 509 if ((panel->sync & FB_SYNC_HOR_HIGH_ACT) == 0) 514 if ((panel->sync & FB_SYNC_VERT_HIGH_ACT) == 0) 793 if (panel->sync & FB_SYNC_CLK_INVERT) 805 /* Configure the vertical and horizontal sync properties. */ 1114 * Function to wait for vertical sync which for this LCD peripheral
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/drivers/net/wan/ |
H A D | farsync.c | 4 * Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards 1855 sync_serial_settings sync; local 1858 if (ifr->ifr_settings.size != sizeof (sync)) { 1863 (&sync, ifr->ifr_settings.ifs_ifsu.sync, sizeof (sync))) { 1867 if (sync.loopback) 1910 switch (sync.clock_type) { 1922 FST_WRL(card, portConfig[i].lineSpeed, sync.clock_rate); 1930 sync_serial_settings sync; local [all...] |
H A D | z85230.c | 327 * We only cover the sync cases for this. If you want 2Mbit async 796 c->sync = 1; 836 c->sync = 0; 851 * @c: The Z8530 channel to configure in sync DMA mode. 862 c->sync = 1; 988 c->sync = 0; 1045 * @c: The Z8530 channel to configure in sync DMA mode. 1056 printk("Opening sync interface for TX-DMA\n"); 1057 c->sync = 1; 1163 c->sync [all...] |
/drivers/usb/musb/ |
H A D | tusb6010.c | 1065 void __iomem *sync = NULL; local 1078 /* dma address for sync dma */ 1081 pr_debug("no sync dma resource?\n"); 1085 musb->sync = mem->start; 1087 sync = ioremap(mem->start, resource_size(mem)); 1088 if (!sync) { 1089 pr_debug("ioremap for sync failed\n"); 1093 musb->sync_va = sync; 1115 if (sync) 1116 iounmap(sync); [all...] |
/drivers/video/fbdev/aty/ |
H A D | radeon_monitor.c | 701 (var->sync & FB_SYNC_HOR_HIGH_ACT) != 0; 703 (var->sync & FB_SYNC_VERT_HIGH_ACT) != 0; 729 var->sync = mode->sync; 817 var->sync = 0; 819 var->sync |= FB_SYNC_HOR_HIGH_ACT; 821 var->sync |= FB_SYNC_VERT_HIGH_ACT;
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/drivers/gpu/ipu-v3/ |
H A D | ipu-dc.c | 130 int map, int wave, int glue, int sync, int stop) 139 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); 142 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); 129 dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, int map, int wave, int glue, int sync, int stop) argument
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/drivers/macintosh/ |
H A D | via-cuda.c | 91 static int cuda_send_request(struct adb_request *req, int sync); 280 /* sync with the CUDA - assert TACK without TIP */ 284 WAIT_FOR((in_8(&via[B]) & TREQ) == 0, "CUDA response to sync"); 287 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)"); 291 /* finish the sync by negating TACK */ 295 WAIT_FOR(in_8(&via[B]) & TREQ, "CUDA response to sync (3)"); 296 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)"); 307 cuda_send_request(struct adb_request *req, int sync) argument 322 if (sync) {
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/drivers/base/regmap/ |
H A D | regcache.c | 273 dev_err(map->dev, "Unable to sync register %#x. %d\n", 328 if (map->cache_ops->sync) 329 ret = map->cache_ops->sync(map, 0, map->max_register); 353 * @map: map to sync. 354 * @min: first register to sync 355 * @max: last register to sync 386 if (map->cache_ops->sync) 387 ret = map->cache_ops->sync(map, min, max); 465 * as dirty then the cache sync will be suppressed. 622 dev_err(map->dev, "Unable to sync registe [all...] |
/drivers/gpu/drm/nouveau/ |
H A D | nv17_fence.c | 90 fctx->base.sync = nv17_fence_sync;
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/drivers/net/ethernet/chelsio/cxgb4/ |
H A D | l2t.c | 52 /* identifies sync vs async L2T_WRITE_REQs */ 139 static int write_l2e(struct adapter *adap, struct l2t_entry *e, int sync) argument 152 e->idx | (sync ? F_SYNC_WR : 0) | 154 req->params = htons(L2T_W_PORT(e->lport) | L2T_W_NOREPLY(!sync)); 164 if (sync && e->state != L2T_STATE_SWITCHING)
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/drivers/video/fbdev/kyro/ |
H A D | fbdev.c | 467 var->sync |= FB_SYNC_HOR_HIGH_ACT; 469 var->sync |= FB_SYNC_VERT_HIGH_ACT; 519 par->HSP = (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 1 : 0; 520 par->VSP = (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 1 : 0;
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/drivers/video/fbdev/omap/ |
H A D | omapfb.h | 184 void (*sync) (void); member in struct:lcd_ctrl
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/drivers/firewire/ |
H A D | core-iso.c | 193 int cycle, int sync, int tags) 195 return ctx->card->driver->start_iso(ctx, cycle, sync, tags); 192 fw_iso_context_start(struct fw_iso_context *ctx, int cycle, int sync, int tags) argument
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/drivers/gpu/host1x/ |
H A D | intr.c | 64 * run through a waiter queue for a single sync point ID 67 static void remove_completed_waiters(struct list_head *head, u32 sync, argument 74 if ((s32)(waiter->thresh - sync) > 0) 196 * Handles sync point threshold triggers, in thread context
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/drivers/s390/cio/ |
H A D | qdio.h | 137 u8 sync:1; member in struct:siga_flag 295 struct siga_flag siga_flag; /* siga sync information from qdioac */ 356 #define need_siga_sync(q) (unlikely(q->irq_ptr->siga_flag.sync))
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/drivers/video/fbdev/i810/ |
H A D | i810_gtf.c | 189 /* sync polarity */ 190 if (!(var->sync & FB_SYNC_HOR_HIGH_ACT)) 192 if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
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/drivers/md/ |
H A D | dm-raid1.c | 205 * only if the mirror is in-sync. 237 DMERR("Primary mirror (%s) failed while out-of-sync: " 290 * are in the no-sync state. We have to recover these by 394 * Update the in sync flag. 398 /* the sync is complete */ 559 * We can only read balance if the region is in sync. 661 struct bio_list sync, nosync, recover, *this_list = NULL; local 672 bio_list_init(&sync); 680 bio_list_add(&sync, bio); 696 this_list = &sync; [all...] |
/drivers/media/common/saa7146/ |
H A D | saa7146_hlp.c | 15 static void calculate_hps_source_and_sync(struct saa7146_dev *dev, int source, int sync, u32* hps_ctrl) argument 18 *hps_ctrl |= (source << 30) | (sync << 28); 531 int sync = vv->current_hps_sync; local 548 calculate_hps_source_and_sync(dev, source, sync, &hps_ctrl); 630 void saa7146_set_hps_source_and_sync(struct saa7146_dev *dev, int source, int sync) argument 639 hps_ctrl |= (source << 30) | (sync << 28); 646 vv->current_hps_sync = sync; 1010 DEB_CAP("forcing sync to new frame\n");
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