/drivers/net/ethernet/chelsio/cxgb3/ |
H A D | common.h | 193 u64 tx_octets; /* total # of octets in good frames */ 194 u64 tx_octets_bad; /* total # of octets in error frames */ 195 u64 tx_frames; /* all good frames */ 196 u64 tx_mcast_frames; /* good multicast frames */ 197 u64 tx_bcast_frames; /* good broadcast frames */ 198 u64 tx_pause; /* # of transmitted pause frames */ 199 u64 tx_deferred; /* frames with deferred transmissions */ 200 u64 tx_late_collisions; /* # of late collisions */ 201 u64 tx_total_collisions; /* # of total collisions */ 202 u64 tx_excess_collision [all...] |
/drivers/net/ethernet/ibm/ehea/ |
H A D | ehea.h | 139 ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask)) 142 (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask))) 155 u64 current_q_offset; /* current queue entry */ 173 u64 addr; 188 u64 ent[EHEA_MAP_ENTRIES]; 227 u64 send_cq_handle; 228 u64 recv_cq_handle; 229 u64 aff_eq_handle; 258 u64 eq_handle; 274 u64 fw_handl [all...] |
/drivers/infiniband/hw/mlx5/ |
H A D | mem.c | 44 void mlx5_ib_cont_pages(struct ib_umem *umem, u64 addr, int *count, int *shift, 50 u64 base = 0; 54 u64 len; 55 u64 pfn; 118 u64 cur = 0; 119 u64 base; 145 int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset) 147 u64 page_size; 148 u64 page_mask; 149 u64 off_siz [all...] |
/drivers/infiniband/hw/ocrdma/ |
H A D | ocrdma_stats.c | 34 char *name, u64 count) 99 (u64)rsrc_stats->dpp_pds); 101 (u64)rsrc_stats->non_dpp_pds); 103 (u64)rsrc_stats->rc_dpp_qps); 105 (u64)rsrc_stats->uc_dpp_qps); 107 (u64)rsrc_stats->ud_dpp_qps); 109 (u64)rsrc_stats->rc_non_dpp_qps); 111 (u64)rsrc_stats->uc_non_dpp_qps); 113 (u64)rsrc_stats->ud_non_dpp_qps); 115 (u64)rsrc_stat [all...] |
/drivers/char/hw_random/ |
H A D | octeon-rng.c | 33 ctl.u64 = 0; 36 cvmx_write_csr((u64)p->control_status, ctl.u64); 45 ctl.u64 = 0; 47 cvmx_write_csr((u64)p->control_status, ctl.u64); 54 *data = cvmx_read64_uint32((u64)p->result); 86 sizeof(u64)); 92 sizeof(u64));
|
/drivers/staging/vt6655/ |
H A D | card.h | 84 void CARDvUpdateNextTBTT(void __iomem *dwIoBase, u64 qwTSF, unsigned short wBeaconInterval); 85 bool CARDbGetCurrentTSF(void __iomem *dwIoBase, u64 *pqwCurrTSF); 86 u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval); 87 u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2); 100 u64 qwBSSTimestamp, u64 qwLocalTSF);
|
/drivers/edac/ |
H A D | octeon_edac-l2c.c | 29 l2t_err_reset.u64 = 0; 30 l2t_err.u64 = cvmx_read_csr(CVMX_L2T_ERR); 41 if (l2t_err_reset.u64) 42 cvmx_write_csr(CVMX_L2T_ERR, l2t_err_reset.u64); 44 l2d_err_reset.u64 = 0; 45 l2d_err.u64 = cvmx_read_csr(CVMX_L2D_ERR); 56 if (l2d_err_reset.u64) 57 cvmx_write_csr(CVMX_L2D_ERR, l2d_err_reset.u64); 68 err_tdtx_reset.u64 = 0; 69 err_tdtx.u64 [all...] |
/drivers/infiniband/hw/mthca/ |
H A D | mthca_doorbell.h | 56 __raw_writeq((__force u64) val, dest); 62 __raw_writeq((__force u64) cpu_to_be64((u64) hi << 32 | lo), dest); 67 *(u64 *) db = *(u64 *) val;
|
/drivers/net/ethernet/intel/ixgbevf/ |
H A D | vf.h | 144 u64 base_vfgprc; 145 u64 base_vfgptc; 146 u64 base_vfgorc; 147 u64 base_vfgotc; 148 u64 base_vfmprc; 150 u64 last_vfgprc; 151 u64 last_vfgptc; 152 u64 last_vfgorc; 153 u64 last_vfgotc; 154 u64 last_vfmpr [all...] |
H A D | ixgbevf.h | 66 u64 packets; 67 u64 bytes; 69 u64 yields; 70 u64 misses; 71 u64 cleaned; 76 u64 restart_queue; 77 u64 tx_busy; 78 u64 tx_done_old; 82 u64 non_eop_descs; 83 u64 alloc_rx_page_faile [all...] |
/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_txrx.h | 72 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ 73 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ 74 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ 75 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ 76 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) | \ 77 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ 78 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ 79 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ 80 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ 81 ((u64) [all...] |
/drivers/net/ethernet/intel/i40evf/ |
H A D | i40e_txrx.h | 72 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ 73 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ 74 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ 75 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ 76 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) | \ 77 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ 78 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ 79 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ 80 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ 81 ((u64) [all...] |
/drivers/block/drbd/ |
H A D | drbd_vli.h | 146 static inline int vli_decode_bits(u64 *out, const u64 in) 148 u64 adj = 1; 168 static inline int __vli_encode_bits(u64 *out, const u64 in) 170 u64 max = 0; 171 u64 adj = 1; 260 static inline int bitstream_put_bits(struct bitstream *bs, u64 val, const unsigned int bits) 293 static inline int bitstream_get_bits(struct bitstream *bs, u64 *out, int bits) 295 u64 va [all...] |
/drivers/infiniband/hw/ehca/ |
H A D | ehca_classes_pSeries.h | 66 u64 handle; 70 u64 handle; 74 u64 handle; 78 u64 handle; 81 u64 handle; 120 u64 dw[2]; 138 u64 dw[2]; 145 u64 send_queue_handle; /* 56 */ 146 u64 recv_queue_handle; /* 58 */ 151 u64 qp_aff_asyn_ev_log_re [all...] |
/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_fcoe.h | 65 u64 *udl; 72 u64 noddp; 73 u64 noddp_ext_buff;
|
/drivers/gpu/drm/nouveau/core/include/subdev/ |
H A D | timer.h | 9 u64 timestamp; 21 bool nouveau_timer_wait_eq(void *, u64 nsec, u32 addr, u32 mask, u32 data); 22 bool nouveau_timer_wait_ne(void *, u64 nsec, u32 addr, u32 mask, u32 data); 23 bool nouveau_timer_wait_cb(void *, u64 nsec, bool (*func)(void *), void *data); 37 u64 (*read)(struct nouveau_timer *); 38 void (*alarm)(struct nouveau_timer *, u64 time, struct nouveau_alarm *);
|
/drivers/dma/ |
H A D | fsldma.h | 71 #define FSL_DMA_EOL ((u64)0x1) 72 #define FSL_DMA_SNEN ((u64)0x10) 74 #define FSL_DMA_NLDA_MASK (~(u64)0x1f) 86 typedef u64 __bitwise v64; 107 u64 cdar; /* 0x08 - Current descriptor address register */ 108 u64 sar; /* 0x10 - Source Address Register */ 109 u64 dar; /* 0x18 - Destination Address Register */ 111 u64 ndar; /* 0x24 - Next Descriptor Address Register */ 192 static u64 in_be64(const u64 __iome [all...] |
/drivers/firmware/ |
H A D | memmap.c | 37 * start and end must be u64 rather than resource_size_t, because e820 40 u64 start; /* start of the memory range */ 41 u64 end; /* end of the memory range (incl.) */ 57 firmware_map_find_entry(u64 start, u64 end, const char *type); 148 static int firmware_map_add_entry(u64 start, u64 end, 225 firmware_map_find_entry_in_list(u64 start, u64 end, const char *type, 252 firmware_map_find_entry(u64 star [all...] |
/drivers/gpu/drm/nouveau/core/include/engine/ |
H A D | device.h | 17 int nouveau_device_create_(void *, enum nv_bus_type type, u64 name, 31 struct nouveau_device *nouveau_device_find(u64 name);
|
/drivers/gpu/drm/nouveau/nvif/ |
H A D | client.h | 22 const char *, u64, const char *, const char *, 25 int nvif_client_new(const char *, const char *, u64, const char *,
|
H A D | driver.h | 6 int (*init)(const char *name, u64 device, const char *cfg, 12 void __iomem *(*map)(void *priv, u64 handle, u32 size);
|
/drivers/net/ethernet/cisco/enic/ |
H A D | enic_api.c | 30 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
|
/drivers/pci/host/ |
H A D | pcie-designware.h | 29 u64 cfg0_base; 30 u64 cfg0_mod_base; 33 u64 cfg1_base; 34 u64 cfg1_mod_base; 37 u64 io_base; 38 u64 io_mod_base; 41 u64 mem_base; 42 u64 mem_mod_base;
|
/drivers/rtc/ |
H A D | rtc-ab3100.c | 51 u64 fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2; 91 u64 fat_time; 101 fat_time = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) | 102 ((u64) buf[3] << 24) | ((u64) buf[2] << 16) | 103 ((u64) buf[1] << 8) | (u64) buf[0]; 105 (u64) (AB3100_RTC_CLOCK_RAT [all...] |
/drivers/scsi/fnic/ |
H A D | fnic_trace.h | 65 u64 val; 69 u64 data[5]; 96 trace_buf->fnaddr.val = (u64)(unsigned long)_fn; \ 100 trace_buf->data[0] = (u64)(unsigned long)_a; \ 101 trace_buf->data[1] = (u64)(unsigned long)_b; \ 102 trace_buf->data[2] = (u64)(unsigned long)_c; \ 103 trace_buf->data[3] = (u64)(unsigned long)_d; \ 104 trace_buf->data[4] = (u64)(unsigned long)_e; \
|