Searched defs:tx (Results 101 - 125 of 288) sorted by relevance

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/drivers/dma/
H A Dat_hdmac.c57 static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx);
560 static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx) argument
562 struct at_desc *desc = txd_to_at_desc(tx);
563 struct at_dma_chan *atchan = to_at_dma_chan(tx->chan);
568 cookie = dma_cookie_assign(tx);
571 dev_vdbg(chan2dev(tx->chan), "tx_submit: started %u\n",
576 dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u\n",
592 * @flags: tx descriptor status flags
679 * @flags: tx descriptor status flags
897 * @flags: tx descripto
[all...]
H A Ddmatest.c483 struct dma_async_tx_descriptor *tx = NULL; local
580 tx = dev->device_prep_dma_memcpy(chan,
584 tx = dev->device_prep_dma_xor(chan,
593 tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
598 if (!tx) {
608 tx->callback = dmatest_callback;
609 tx->callback_param = &done;
610 cookie = tx->tx_submit(tx);
H A Dedma.c138 *to_edma_desc(struct dma_async_tx_descriptor *tx) argument
140 return container_of(tx, struct edma_desc, vdesc.tx);
166 echan->edesc = to_edma_desc(&vdesc->tx);
963 if (echan->edesc && echan->edesc->vdesc.tx.cookie == cookie)
966 txstate->residue = to_edma_desc(&vdesc->tx)->residue;
H A Dfsldma.c408 static dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx) argument
410 struct fsldma_chan *chan = to_fsl_chan(tx->chan);
411 struct fsl_desc_sw *desc = tx_to_fsl_desc(tx);
H A Dintel_mid_dma.c327 * mark completed when tx is completete
339 /*tx is complete*/
428 * @tx: dma engine descriptor
432 static dma_cookie_t intel_mid_dma_tx_submit(struct dma_async_tx_descriptor *tx) argument
434 struct intel_mid_dma_desc *desc = to_intel_mid_dma_desc(tx);
435 struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(tx->chan);
439 cookie = dma_cookie_assign(tx);
H A Diop-adma.c44 #define tx_to_iop_adma_slot(tx) \
45 container_of(tx, struct iop_adma_desc_slot, async_tx)
68 struct dma_async_tx_descriptor *tx = &desc->async_tx; local
70 BUG_ON(tx->cookie < 0);
71 if (tx->cookie > 0) {
72 cookie = tx->cookie;
73 tx->cookie = 0;
78 if (tx->callback)
79 tx->callback(tx
375 iop_adma_tx_submit(struct dma_async_tx_descriptor *tx) argument
854 struct dma_async_tx_descriptor *tx; local
930 struct dma_async_tx_descriptor *tx; local
1108 struct dma_async_tx_descriptor *tx; local
[all...]
H A Dmmp_tdma.c342 static dma_cookie_t mmp_tdma_tx_submit(struct dma_async_tx_descriptor *tx) argument
344 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(tx->chan);
H A Dmv_xor.c42 #define to_mv_xor_slot(tx) \
43 container_of(tx, struct mv_xor_desc_slot, async_tx)
394 mv_xor_tx_submit(struct dma_async_tx_descriptor *tx) argument
396 struct mv_xor_desc_slot *sw_desc = to_mv_xor_slot(tx);
397 struct mv_xor_chan *mv_chan = to_mv_xor_chan(tx->chan);
407 cookie = dma_cookie_assign(tx);
692 struct dma_async_tx_descriptor *tx; local
745 tx = mv_xor_prep_dma_memcpy(dma_chan, dest_dma, src_dma,
747 if (!tx) {
754 cookie = mv_xor_tx_submit(tx);
801 struct dma_async_tx_descriptor *tx; local
[all...]
H A Dmxs-dma.c312 static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx) argument
314 return dma_cookie_assign(tx);
H A Dsun6i-dma.c180 to_sun6i_desc(struct dma_async_tx_descriptor *tx) argument
182 return container_of(tx, struct sun6i_desc, vd.tx);
331 struct sun6i_desc *txd = to_sun6i_desc(&vd->tx);
332 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(vd->tx.chan->device);
405 pchan->desc = to_sun6i_desc(&desc->tx);
747 txd = to_sun6i_desc(&vd->tx);
H A Dtxx9dmac.c190 static dma_cookie_t txx9dmac_tx_submit(struct dma_async_tx_descriptor *tx);
697 static dma_cookie_t txx9dmac_tx_submit(struct dma_async_tx_descriptor *tx) argument
699 struct txx9dmac_desc *desc = txd_to_txx9dmac_desc(tx);
700 struct txx9dmac_chan *dc = to_txx9dmac_chan(tx->chan);
704 cookie = dma_cookie_assign(tx);
706 dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u %p\n",
/drivers/dma/dw/
H A Dcore.c651 static dma_cookie_t dwc_tx_submit(struct dma_async_tx_descriptor *tx) argument
653 struct dw_desc *desc = txd_to_dw_desc(tx);
654 struct dw_dma_chan *dwc = to_dw_dma_chan(tx->chan);
659 cookie = dma_cookie_assign(tx);
667 dev_vdbg(chan2dev(tx->chan), "%s: queued %u\n", __func__, desc->txd.cookie);
/drivers/dma/ioat/
H A Ddma.c230 static dma_cookie_t ioat1_tx_submit(struct dma_async_tx_descriptor *tx) argument
232 struct dma_chan *c = tx->chan;
234 struct ioat_desc_sw *desc = tx_to_ioat_desc(tx);
242 cookie = dma_cookie_assign(tx);
610 struct dma_async_tx_descriptor *tx; local
619 tx = &desc->txd;
626 if (tx->cookie) {
627 dma_cookie_complete(tx);
628 dma_descriptor_unmap(tx);
630 if (tx
827 struct dma_async_tx_descriptor *tx; local
[all...]
H A Ddma_v3.c390 struct dma_async_tx_descriptor *tx; local
401 tx = &desc->txd;
402 if (tx->cookie) {
403 dma_cookie_complete(tx);
404 dma_descriptor_unmap(tx);
405 if (tx->callback) {
406 tx->callback(tx->callback_param);
407 tx->callback = NULL;
411 if (tx
1208 struct dma_async_tx_descriptor *tx; local
[all...]
/drivers/gpio/
H A Dgpio-mcp23s08.c171 u8 tx[2], rx[1]; local
174 tx[0] = mcp->addr | 0x01;
175 tx[1] = reg;
176 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
182 u8 tx[3]; local
184 tx[0] = mcp->addr;
185 tx[1] = reg;
186 tx[2] = val;
187 return spi_write_then_read(mcp->data, tx, sizeo
193 u8 tx[2], *tmp; local
212 u8 tx[2], rx[2]; local
223 u8 tx[4]; local
235 u8 tx[2]; local
[all...]
/drivers/infiniband/ulp/ipoib/
H A Dipoib_cm.c695 struct ipoib_cm_tx *tx,
707 return ib_post_send(tx->qp, &priv->tx_wr, &bad_wr);
710 void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_tx *tx) argument
717 if (unlikely(skb->len > tx->mtu)) {
719 skb->len, tx->mtu);
722 ipoib_cm_skb_too_long(dev, skb, tx->mtu - IPOIB_ENCAP_LEN);
727 tx->tx_head, skb->len, tx->qp->qp_num);
736 tx_req = &tx->tx_ring[tx
694 post_send(struct ipoib_dev_priv *priv, struct ipoib_cm_tx *tx, unsigned int wr_id, u64 addr, int len) argument
778 struct ipoib_cm_tx *tx = wc->qp->qp_context; local
1022 ipoib_cm_create_tx_qp(struct net_device *dev, struct ipoib_cm_tx *tx) argument
1222 struct ipoib_cm_tx *tx = cm_id->context; local
1275 struct ipoib_cm_tx *tx; local
1291 ipoib_cm_destroy_tx(struct ipoib_cm_tx *tx) argument
[all...]
/drivers/input/joystick/
H A Danalog.c393 unsigned int i, t, tx; local
413 tx = ~0;
426 if (t < tx) tx = t;
429 port->loop = tx / 50;
/drivers/input/touchscreen/
H A Dtsc2005.c163 u8 tx = TSC2005_CMD | TSC2005_CMD_12BIT | cmd; local
165 .tx_buf = &tx,
187 u32 tx = ((reg | TSC2005_REG_PND0) << 16) | value; local
189 .tx_buf = &tx,
/drivers/media/platform/exynos-gsc/
H A Dgsc-core.c276 u32 tx, u32 ty, u32 *hratio)
294 gsc_cal_prescaler_ratio(var, s_frame->crop.width, tx, wratio);
639 int tx, ty; local
653 tx = d_frame->crop.height;
655 tx = d_frame->crop.width;
659 if (tx <= 0 || ty <= 0) {
660 dev_err(dev, "Invalid target size: %dx%d", tx, ty);
665 tx, &sc->pre_hratio);
679 tx, ty, &sc->pre_vratio);
684 sc->main_hratio = (s_frame->crop.width << 16) / tx;
274 gsc_check_src_scale_info(struct gsc_variant *var, struct gsc_frame *s_frame, u32 *wratio, u32 tx, u32 ty, u32 *hratio) argument
[all...]
/drivers/media/platform/exynos4-is/
H A Dfimc-core.c256 int tx, ty, sx, sy; local
261 tx = d_frame->height;
263 tx = d_frame->width;
266 if (tx <= 0 || ty <= 0) {
267 dev_err(dev, "Invalid target size: %dx%d\n", tx, ty);
280 ret = fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor);
292 sc->main_hratio = (sx << 14) / (tx << sc->hfactor);
295 sc->main_hratio = (sx << 8) / (tx << sc->hfactor);
300 sc->scaleup_h = (tx >= sx) ? 1 : 0;
/drivers/media/platform/
H A Dm2m-deinterlace.c232 struct dma_async_tx_descriptor *tx; local
349 tx = dmadev->device_prep_interleaved_dma(chan, ctx->xt, flags);
350 if (tx == NULL) {
356 tx->callback = dma_callback;
357 tx->callback_param = ctx;
360 ctx->cookie = dmaengine_submit(tx);
/drivers/media/rc/
H A Dfintek-cir.h76 } tx; member in struct:fintek_dev
185 #define CIR_CR_CLASS 0x07 /* 0xff = rx-only, 0x66 = rx + 2 tx,
186 0x33 = rx + 1 tx */
/drivers/misc/carma/
H A Dcarma-fpga-program.c468 struct dma_async_tx_descriptor *tx; local
536 tx = dmaengine_prep_dma_sg(chan, table.sgl, num_pages,
538 if (!tx) {
544 cookie = tx->tx_submit(tx);
H A Dcarma-fpga.c632 struct dma_async_tx_descriptor *tx; local
650 tx = chan->device->device_prep_dma_sg(chan,
654 if (!tx) {
660 cookie = tx->tx_submit(tx);
669 tx = chan->device->device_prep_dma_memcpy(chan, dst, src,
672 if (!tx) {
678 tx->callback = data_dma_cb;
679 tx->callback_param = priv;
682 cookie = tx
[all...]
/drivers/mmc/card/
H A Dsdio_uart.c60 __u32 tx; member in struct:uart_icount
440 port->icount.tx++;
457 port->icount.tx++;
979 seq_printf(m, " tx:%d rx:%d",
980 port->icount.tx, port->icount.rx);

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