Searched defs:state (Results 176 - 200 of 1738) sorted by relevance

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/drivers/acpi/acpica/
H A Ddswstate.c63 * walk_state - Current Walk state
76 union acpi_generic_state *state; local
81 state = walk_state->results;
83 /* Incorrect state of result stack */
85 if (state && !walk_state->result_count) {
90 if (!state && walk_state->result_count) {
91 ACPI_ERROR((AE_INFO, "No result state for result stack"));
97 if (!state) {
108 *object = state->results.obj_desc[index];
116 state
149 union acpi_generic_state *state; local
219 union acpi_generic_state *state; local
264 union acpi_generic_state *state; local
706 union acpi_generic_state *state; local
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H A Dutmisc.c179 * PARAMETERS: object - Object to be added to the new state
181 * state_list - List the state will be added to
185 * DESCRIPTION: Create a new state and push it
194 union acpi_generic_state *state; local
204 state = acpi_ut_create_update_state(object, action);
205 if (!state) {
209 acpi_ut_push_generic_state(state_list, state);
235 union acpi_generic_state *state; local
241 state = acpi_ut_create_pkg_state(source_object, target_object, 0);
242 if (!state) {
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/drivers/acpi/
H A Dprocessor_thermal.c64 * Note we can lose a CPU on cpu hotunplug, in this case we forget the state
126 static int cpufreq_set_cur_state(unsigned int cpu, int state) argument
133 reduction_pctg(cpu) = state;
179 static int cpufreq_set_cur_state(unsigned int cpu, int state) argument
203 unsigned long *state)
215 *state = acpi_processor_max_state(pr);
235 *cur_state += pr->throttling.state;
241 unsigned long state)
257 if (state > acpi_processor_max_state(pr))
260 if (state <
202 processor_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state) argument
240 processor_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) argument
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/drivers/block/drbd/
H A Ddrbd_proc.c64 union drbd_dev_state state, unsigned long *rs_total,
76 if (state.conn == C_VERIFY_S || state.conn == C_VERIFY_T)
84 * between state change and reset of rs_total.
114 union drbd_dev_state state)
121 drbd_get_syncer_progress(device, state, &rs_total, &rs_left, &res);
133 if (state.conn == C_VERIFY_S || state.conn == C_VERIFY_T)
205 if (state.conn == C_SYNC_TARGET ||
206 state
63 drbd_get_syncer_progress(struct drbd_device *device, union drbd_dev_state state, unsigned long *rs_total, unsigned long *bits_left, unsigned int *per_mil_done) argument
113 drbd_syncer_progress(struct drbd_device *device, struct seq_file *seq, union drbd_dev_state state) argument
244 union drbd_dev_state state; local
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/drivers/bluetooth/
H A Dbcm203x.c66 unsigned long state; member in struct:bcm203x_data
89 data->state = BCM203X_ERROR;
93 switch (data->state) {
100 data->state = BCM203X_SELECT_MEMORY;
110 data->state = BCM203X_CHECK_MEMORY;
119 data->state = BCM203X_ERROR;
123 data->state = BCM203X_LOAD_FIRMWARE;
130 data->state = BCM203X_CHECK_FIRMWARE;
147 data->state = BCM203X_ERROR;
151 data->state
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/drivers/clk/tegra/
H A Dclk-super.c46 u32 val, state; local
51 state = val & SUPER_STATE_MASK;
53 BUG_ON((state != super_state(SUPER_STATE_RUN)) &&
54 (state != super_state(SUPER_STATE_IDLE)));
55 shift = (state == super_state(SUPER_STATE_IDLE)) ?
75 u32 val, state; local
84 state = val & SUPER_STATE_MASK;
85 BUG_ON((state != super_state(SUPER_STATE_RUN)) &&
86 (state != super_state(SUPER_STATE_IDLE)));
87 shift = (state
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/drivers/clk/ti/
H A Dapll.c43 u8 state = 1; local
52 state <<= __ffs(ad->idlest_mask);
57 if ((v & ad->idlest_mask) == state)
65 state <<= __ffs(ad->idlest_mask);
69 if ((v & ad->idlest_mask) == state)
79 clk_name, (state) ? "locked" : "bypassed");
83 clk_name, (state) ? "locked" : "bypassed", i);
92 u8 state = 1; local
97 state <<= __ffs(ad->idlest_mask);
/drivers/cpufreq/
H A Dia64-acpi-cpufreq.c2 * This file provides the ACPI based P-state support. This
140 int state)
156 if (state == data->acpi_data.state) {
158 pr_debug("Called after resume, resetting to P%d\n", state);
161 pr_debug("Already at target state (P%d)\n", state);
168 data->acpi_data.state, state);
171 * First we write the target state'
137 processor_set_freq( struct cpufreq_acpi_io *data, struct cpufreq_policy *policy, int state) argument
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H A Dspeedstep-ich.c86 * speedstep_set_state - set the SpeedStep state
87 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
89 * Tries to change the SpeedStep state. Can be called from
92 static void speedstep_set_state(unsigned int state) argument
98 if (state > 0x1)
104 /* read state */
109 /* write new state */
111 value |= state;
135 if (state
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H A Dspeedstep-lib.c384 void (*set_state) (unsigned int state))
405 /* switch to low state */
419 /* switch to high state */
439 /* switch to previous state, if necessary */
380 speedstep_get_freqs(enum speedstep_processor processor, unsigned int *low_speed, unsigned int *high_speed, unsigned int *transition_latency, void (*set_state) (unsigned int state)) argument
H A Dspeedstep-smi.c103 u32 state = 0; local
123 "=d" (state), "=D" (edi), "=S" (dummy)
126 "c" (state),
144 * speedstep_set_state - set the SpeedStep state
145 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
148 static void speedstep_set_state(unsigned int state) argument
155 if (state > 0x1)
163 pr_debug("trying to set frequency to state %u "
165 state, comman
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/drivers/cpuidle/governors/
H A Dladder.c48 * ladder_do_selection - prepares private data for a state change
50 * @old_idx: the current state index
51 * @new_idx: the new target state index
62 * ladder_select_state - selects the next state to enter
128 /* otherwise remain at the current state */
143 struct cpuidle_state *state; local
148 state = &drv->states[i];
158 lstate->threshold.promotion_time = state->exit_latency;
160 lstate->threshold.demotion_time = state->exit_latency;
169 * @index: the index of actual state entere
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/drivers/crypto/ccp/
H A Dccp-pci.c275 static int ccp_pci_suspend(struct pci_dev *pdev, pm_message_t state) argument
/drivers/crypto/nx/
H A Dnx-aes-xcbc.c35 u8 state[AES_BLOCK_SIZE]; member in struct:xcbc_state
147 out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *)sctx->state,
173 * 1: <= AES_BLOCK_SIZE: copy into state, return 0
249 /* copy the leftover back into the state struct */
/drivers/crypto/qat/qat_common/
H A Dadf_aer.c59 pci_channel_state_t state)
69 if (state == pci_channel_io_perm_failure) {
58 adf_error_detected(struct pci_dev *pdev, pci_channel_state_t state) argument
H A Dadf_cfg_common.h84 uint8_t state; member in struct:adf_dev_status_info
/drivers/gpio/
H A Dgpio-bt8xx.c248 static int bt8xxgpio_suspend(struct pci_dev *pdev, pm_message_t state) argument
266 pci_set_power_state(pdev, pci_choose_state(pdev, state));
H A Dgpio-ks8695.c123 * Configure the GPIO line as an output, with default state.
126 unsigned int pin, int state)
138 /* set line state */
140 if (state)
158 * Set the state of an output GPIO line.
161 unsigned int pin, int state)
170 /* set output line state */
172 if (state)
183 * Read the state of a GPIO line.
125 ks8695_gpio_direction_output(struct gpio_chip *gc, unsigned int pin, int state) argument
160 ks8695_gpio_set_value(struct gpio_chip *gc, unsigned int pin, int state) argument
/drivers/gpu/drm/nouveau/core/engine/graph/
H A Dctx.h76 _cp_bra(struct nouveau_grctx *ctx, u32 mod, int flag, int state, int name) argument
87 (state ? 0 : CP_BRA_IF_CLEAR));
94 _cp_wait(struct nouveau_grctx *ctx, int flag, int state) argument
96 cp_out(ctx, CP_WAIT | flag | (state ? CP_WAIT_SET : 0));
101 _cp_set(struct nouveau_grctx *ctx, int flag, int state) argument
103 cp_out(ctx, CP_SET | flag | (state ? CP_SET_1 : 0));
/drivers/gpu/drm/nouveau/core/subdev/i2c/
H A Dbit.c33 i2c_drive_scl(struct nouveau_i2c_port *port, int state) argument
35 port->func->drive_scl(port, state);
39 i2c_drive_sda(struct nouveau_i2c_port *port, int state) argument
41 port->func->drive_sda(port, state);
/drivers/gpu/drm/nouveau/dispnv04/
H A Dtvnv04.c76 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; local
82 state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
88 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
97 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
104 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head]; local
106 state->tv_setup = 0;
109 state->CRTC[NV_CIO_CRE_49] |= 0x10;
111 state->CRTC[NV_CIO_CRE_49] &= ~0x10;
114 state->CRTC[NV_CIO_CRE_LCD__INDEX]);
116 state
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/drivers/gpu/drm/radeon/
H A Dradeon_irq.c39 void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state) argument
43 if (state)
52 static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state) argument
56 if (state)
/drivers/gpu/drm/ttm/
H A Dttm_tt.c77 /* p isn't in the default caching state, set it to
116 if (ttm->state == tt_unpopulated) {
154 enum ttm_caching_state state; local
157 state = tt_wc;
159 state = tt_uncached;
161 state = tt_cached;
163 return ttm_tt_set_caching(ttm, state);
172 if (ttm->state == tt_bound) {
176 if (ttm->state == tt_unbound)
197 ttm->state
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/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_cmdbuf_res.c45 * @state: Staging state of this resource entry.
52 enum vmw_cmdbuf_res_state state; member in struct:vmw_cmdbuf_res
135 switch (entry->state) {
137 entry->state = VMW_CMDBUF_RES_COMMITED;
169 switch (entry->state) {
178 entry->state = VMW_CMDBUF_RES_COMMITED;
218 cres->state = VMW_CMDBUF_RES_ADD;
237 * state it then either removes the entry from the staging list or adds it
238 * to it with a staging state o
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/drivers/hid/
H A Dhid-roccat-arvo.h19 uint8_t state; member in struct:arvo_mode_key

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