/drivers/gpu/drm/nouveau/core/engine/fifo/ |
H A D | nv10.c | 60 struct nouveau_oclass *oclass, void *data, u32 size, 65 } *args = data; 148 struct nouveau_oclass *oclass, void *data, u32 size, 58 nv10_fifo_chan_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument 147 nv10_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/engine/graph/ |
H A D | nv108.c | 158 u32 data; member in struct:__anon821 182 nv_wr32(priv, magic[i].addr, magic[i].data); 193 .code.data = nv108_grhub_code, 195 .data.data = nv108_grhub_data, 196 .data.size = sizeof(nv108_grhub_data), 203 .code.data = nv108_grgpc_code, 205 .data.data = nv108_grgpc_data, 206 .data [all...] |
H A D | nv30.c | 46 struct nouveau_oclass *oclass, void *data, u32 size, 134 struct nouveau_oclass *oclass, void *data, u32 size, 44 nv30_graph_context_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument 133 nv30_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/include/core/ |
H A D | client.h | 14 void *data; member in struct:nouveau_client 52 void *data, u32 size);
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/drivers/gpu/drm/nouveau/core/subdev/bios/ |
H A D | M0205.c | 34 u32 data = 0x00000000; local 38 data = nv_ro32(bios, bit_M.offset + 0x05); 39 if (data) { 40 *ver = nv_ro08(bios, data + 0x00); 43 *hdr = nv_ro08(bios, data + 0x01); 44 *len = nv_ro08(bios, data + 0x02); 45 *ssz = nv_ro08(bios, data + 0x03); 46 *snr = nv_ro08(bios, data + 0x04); 47 *cnt = nv_ro08(bios, data + 0x05); 48 return data; 63 u32 data = nvbios_M0205Te(bios, ver, hdr, cnt, len, snr, ssz); local 80 u32 data = nvbios_M0205Te(bios, ver, hdr, cnt, len, &snr, &ssz); local 96 u32 data = nvbios_M0205Ee(bios, idx, ver, hdr, cnt, len); local 113 u32 data = nvbios_M0205Ee(bios, ent, ver, hdr, &cnt, &len); local 126 u32 data = nvbios_M0205Se(bios, ent, idx, ver, hdr); local [all...] |
H A D | boost.c | 64 u16 data = nvbios_boostTe(bios, ver, hdr, cnt, len, &snr, &ssz); local 65 if (data && idx < *cnt) { 66 data = data + *hdr + (idx * (*len + (snr * ssz))); 70 return data; 79 u16 data = nvbios_boostEe(bios, idx, ver, hdr, cnt, len); local 81 if (data) { 82 info->pstate = (nv_ro16(bios, data + 0x00) & 0x01e0) >> 5; 83 info->min = nv_ro16(bios, data + 0x02) * 1000; 84 info->max = nv_ro16(bios, data 93 u32 data, idx = 0; local 102 nvbios_boostSe(struct nouveau_bios *bios, int idx, u16 data, u8 *ver, u8 *hdr, u8 cnt, u8 len) argument 114 nvbios_boostSp(struct nouveau_bios *bios, int idx, u16 data, u8 *ver, u8 *hdr, u8 cnt, u8 len, struct nvbios_boostS *info) argument [all...] |
H A D | cstep.c | 63 u16 data = nvbios_cstepTe(bios, ver, hdr, &cnt, &len, &xnr, &xsz); local 64 if (data && idx < cnt) { 65 data = data + *hdr + (idx * len); 67 return data; 76 u16 data = nvbios_cstepEe(bios, idx, ver, hdr); local 78 if (data) { 79 info->pstate = (nv_ro16(bios, data + 0x00) & 0x01e0) >> 5; 80 info->index = nv_ro08(bios, data + 0x03); 82 return data; 89 u32 data, idx = 0; local 101 u16 data = nvbios_cstepTe(bios, ver, hdr, &cnt, &len, &xnr, &xsz); local 114 u16 data = nvbios_cstepXe(bios, idx, ver, hdr); local [all...] |
H A D | perf.c | 161 u32 data = 0x00000000; local 163 data = perfE + *hdr + (idx * len); 166 return data; 174 u32 data = nvbios_perfSe(bios, perfE, idx, ver, hdr, cnt, len); local 176 switch (!!data * *ver) { 178 info->v40.freq = (nv_ro16(bios, data + 0x00) & 0x3fff) * 1000; 183 return data;
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/drivers/gpu/drm/nouveau/core/subdev/bus/ |
H A D | nv04.c | 67 struct nouveau_oclass *oclass, void *data, u32 size, 66 nv04_bus_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/subdev/fb/ |
H A D | nv04.c | 58 struct nouveau_oclass *oclass, void *data, u32 size, 57 nv04_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/subdev/fuse/ |
H A D | g80.c | 55 struct nouveau_oclass *oclass, void *data, u32 size, 54 g80_fuse_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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H A D | gf100.c | 57 struct nouveau_oclass *oclass, void *data, u32 size, 56 gf100_fuse_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/subdev/gpio/ |
H A D | nv10.c | 54 u32 reg, mask, data; local 60 data = (dir << 4) | out; 66 data = (dir << 1) | out; 72 data = (dir << 1) | out; 77 nv_mask(gpio, reg, mask << line, data << line); 92 nv10_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data) argument 96 inte = (inte & ~(mask << 16)) | (data << 16); 98 inte = (inte & ~mask) | data;
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H A D | nvd0.c | 36 u32 data = nv_ro32(bios, entry); local 37 u8 line = (data & 0x0000003f); 38 u8 defs = !!(data & 0x00000080); 39 u8 func = (data & 0x0000ff00) >> 8; 40 u8 unk0 = (data & 0x00ff0000) >> 16; 41 u8 unk1 = (data & 0x1f000000) >> 24; 58 u32 data = ((dir ^ 1) << 13) | (out << 12); local 59 nv_mask(gpio, 0x00d610 + (line * 4), 0x00003000, data);
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/drivers/gpu/drm/nouveau/core/subdev/i2c/ |
H A D | aux.c | 28 nv_rdaux(struct nouveau_i2c_port *port, u32 addr, u8 *data, u8 size) argument 34 ret = port->func->aux(port, true, 9, addr, data, size); 43 nv_wraux(struct nouveau_i2c_port *port, u32 addr, u8 *data, u8 size) argument 49 ret = port->func->aux(port, true, 8, addr, data, size);
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H A D | nvd0.c | 53 struct nouveau_oclass *oclass, void *data, u32 index, 56 struct dcb_i2c_entry *info = data; 71 port->data = 0x0000e001; 52 nvd0_i2c_port_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 index, struct nouveau_object **pobject) argument
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H A D | pad.c | 76 struct nouveau_oclass *oclass, void *data, u32 index, 75 _nvkm_i2c_pad_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 index, struct nouveau_object **pobject) argument
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H A D | padnv94.c | 63 struct nouveau_oclass *oclass, void *data, u32 index, 62 nv94_i2c_pad_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 index, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/subdev/ibus/ |
H A D | gk20a.c | 79 struct nouveau_oclass *oclass, void *data, u32 size, 78 gk20a_ibus_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/subdev/instmem/ |
H A D | nv40.c | 41 nv40_instmem_wr32(struct nouveau_object *object, u64 addr, u32 data) argument 44 iowrite32_native(data, priv->iomem + addr); 49 struct nouveau_oclass *oclass, void *data, u32 size, 48 nv40_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/core/subdev/therm/ |
H A D | nva3.c | 71 struct nouveau_oclass *oclass, void *data, u32 size, 69 nva3_therm_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) argument
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/drivers/gpu/drm/nouveau/nvif/ |
H A D | client.c | 30 nvif_client_ioctl(struct nvif_client *client, void *data, u32 size) argument 32 return client->driver->ioctl(client->base.priv, client->super, data, size, NULL);
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/drivers/gpu/drm/qxl/ |
H A D | qxl_debugfs.c | 40 qxl_debugfs_irq_received(struct seq_file *m, void *data) argument 54 qxl_debugfs_buffers_info(struct seq_file *m, void *data) argument
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/drivers/gpu/drm/rcar-du/ |
H A D | rcar_du_group.c | 42 void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data) argument 44 rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data);
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/drivers/gpu/host1x/ |
H A D | intr.h | 30 * 'data' points to a channel 36 * 'data' points to a wait_queue_head_t 42 * 'data' points to a wait_queue_head_t 62 void *data; member in struct:host1x_waitlist 72 * @data a pointer to extra data depending on action, see above 79 enum host1x_intr_action action, void *data,
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