Searched refs:addr (Results 76 - 100 of 3084) sorted by relevance

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/drivers/net/wireless/cw1200/
H A Dhwbus.h23 int (*hwbus_memcpy_fromio)(struct hwbus_priv *self, unsigned int addr,
25 int (*hwbus_memcpy_toio)(struct hwbus_priv *self, unsigned int addr,
H A Dhwio.h98 #define CW1200_APB(addr) (PAC_SHARED_MEMORY_SILICON + (addr))
164 int cw1200_reg_read(struct cw1200_common *priv, u16 addr,
166 int cw1200_reg_write(struct cw1200_common *priv, u16 addr,
170 u16 addr, u16 *val)
174 i = cw1200_reg_read(priv, addr, &tmp, sizeof(tmp));
180 u16 addr, u16 val)
183 return cw1200_reg_write(priv, addr, &tmp, sizeof(tmp));
187 u16 addr, u32 *val)
190 int i = cw1200_reg_read(priv, addr,
169 cw1200_reg_read_16(struct cw1200_common *priv, u16 addr, u16 *val) argument
179 cw1200_reg_write_16(struct cw1200_common *priv, u16 addr, u16 val) argument
186 cw1200_reg_read_32(struct cw1200_common *priv, u16 addr, u32 *val) argument
195 cw1200_reg_write_32(struct cw1200_common *priv, u16 addr, u32 val) argument
207 cw1200_apb_read(struct cw1200_common *priv, u32 addr, void *buf, size_t buf_len) argument
215 cw1200_ahb_read(struct cw1200_common *priv, u32 addr, void *buf, size_t buf_len) argument
223 cw1200_apb_read_32(struct cw1200_common *priv, u32 addr, u32 *val) argument
232 cw1200_apb_write_32(struct cw1200_common *priv, u32 addr, u32 val) argument
238 cw1200_ahb_read_32(struct cw1200_common *priv, u32 addr, u32 *val) argument
[all...]
/drivers/gpu/drm/nouveau/core/subdev/fb/
H A Dnv10.c30 nv10_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch, argument
33 tile->addr = 0x80000000 | addr;
34 tile->limit = max(1u, addr + size) - 1;
41 tile->addr = 0;
52 nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);
H A Dnv44.c30 nv44_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch, argument
33 tile->addr = 0x00000001; /* mode = vram */
34 tile->addr |= addr;
35 tile->limit = max(1u, addr + size) - 1;
44 nv_wr32(pfb, 0x100600 + (i * 0x10), tile->addr);
/drivers/gpu/drm/nouveau/core/subdev/i2c/
H A Dpadnv94.c29 int addr; member in struct:nv94_i2c_pad
37 nv_mask(i2c, 0x00e50c + pad->addr, 0x00000001, 0x00000001);
49 nv_mask(i2c, 0x00e500 + pad->addr, 0x0000c003, 0x00000002);
53 nv_mask(i2c, 0x00e500 + pad->addr, 0x0000c003, 0x0000c001);
57 nv_mask(i2c, 0x00e50c + pad->addr, 0x00000001, 0x00000000);
74 pad->addr = index * 0x50;;
/drivers/gpu/drm/nouveau/core/subdev/timer/
H A Dbase.c28 nouveau_timer_wait_eq(void *obj, u64 nsec, u32 addr, u32 mask, u32 data) argument
36 if ((nv_rd32(obj, addr) & mask) == data)
39 if ((nv_ro32(obj, addr) & mask) == data)
48 nouveau_timer_wait_ne(void *obj, u64 nsec, u32 addr, u32 mask, u32 data) argument
56 if ((nv_rd32(obj, addr) & mask) != data)
59 if ((nv_ro32(obj, addr) & mask) != data)
/drivers/media/rc/img-ir/
H A Dimg-ir-sharp.c18 unsigned int addr, cmd, exp, chk; local
23 addr = (raw >> 0) & 0x1f;
36 *scancode = addr << 8 | cmd;
44 unsigned int addr, cmd, exp = 0, chk = 0; local
47 addr = (in->data >> 8) & 0x1f;
59 out->data = addr |
/drivers/net/wireless/ath/wil6210/
H A Dfw.h38 /* data block. write starting from @addr
43 __le32 addr; member in struct:wil_fw_record_data
47 /* fill with constant @value, @size bytes starting from @addr */
49 __le32 addr; member in struct:wil_fw_record_fill
71 __le32 addr; member in struct:wil_fw_data_dwrite
76 /* write @value to the @addr,
84 /* verify condition: [@addr] & @mask == @value
88 __le32 addr; /* read from this address */ member in struct:wil_fw_record_verify
108 __le32 addr; member in struct:wil_fw_data_gw
132 __le32 addr; member in struct:wil_fw_data_gw4
[all...]
/drivers/scsi/
H A Dinitio.c363 * @addr: Address of word in E2PROM
367 static u16 initio_se2_rd(unsigned long base, u8 addr) argument
373 instr = (u8) (addr | 0x80);
396 * @addr: Address of word in E2PROM
402 static void initio_se2_wr(unsigned long base, u8 addr, u16 val) argument
408 instr = (u8) (addr | 0x40);
540 if (inb(host->addr + TUL_XStatus) & XPEND) { /* if DMA xfer is pending, abort DMA xfer */
541 outb(TAX_X_ABT | TAX_X_CLR_FIFO, host->addr + TUL_XCmd);
543 while ((inb(host->addr + TUL_Int) & XABT) == 0)
546 outb(TSC_FLUSH_FIFO, host->addr
[all...]
/drivers/media/usb/em28xx/
H A Dem28xx-i2c.c50 static int em2800_i2c_send_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len) argument
61 b2[4] = addr;
74 addr, ret);
96 em28xx_warn("write to i2c device at 0x%x timed out\n", addr);
104 static int em2800_i2c_recv_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len) argument
116 buf2[0] = addr;
120 addr, ret);
145 addr);
152 addr, ret);
165 static int em2800_i2c_check_for_device(struct em28xx *dev, u8 addr) argument
179 em28xx_i2c_send_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len, int stop) argument
247 em28xx_i2c_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len) argument
307 em28xx_i2c_check_for_device(struct em28xx *dev, u16 addr) argument
322 em25xx_bus_B_send_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len) argument
374 em25xx_bus_B_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len) argument
429 em25xx_bus_B_check_for_device(struct em28xx *dev, u16 addr) argument
445 i2c_check_for_device(struct em28xx_i2c_bus *i2c_bus, u16 addr) argument
463 u16 addr = msg.addr << 1; local
479 u16 addr = msg.addr << 1; local
501 int addr, rc, i; local
615 em28xx_i2c_read_block(struct em28xx *dev, unsigned bus, u16 addr, bool addr_w16, u16 len, u8 *data) argument
[all...]
/drivers/gpu/drm/nouveau/core/include/core/
H A Dobject.h140 nv_ro08(void *obj, u64 addr) argument
142 u8 data = nv_ofuncs(obj)->rd08(obj, addr);
143 nv_spam(obj, "nv_ro08 0x%08llx 0x%02x\n", addr, data);
148 nv_ro16(void *obj, u64 addr) argument
150 u16 data = nv_ofuncs(obj)->rd16(obj, addr);
151 nv_spam(obj, "nv_ro16 0x%08llx 0x%04x\n", addr, data);
156 nv_ro32(void *obj, u64 addr) argument
158 u32 data = nv_ofuncs(obj)->rd32(obj, addr);
159 nv_spam(obj, "nv_ro32 0x%08llx 0x%08x\n", addr, data);
164 nv_wo08(void *obj, u64 addr, u argument
171 nv_wo16(void *obj, u64 addr, u16 data) argument
178 nv_wo32(void *obj, u64 addr, u32 data) argument
185 nv_mo32(void *obj, u64 addr, u32 mask, u32 data) argument
193 nv_memcmp(void *obj, u32 addr, const char *str, u32 len) argument
[all...]
/drivers/input/keyboard/
H A Dgoldfish_events.c40 void __iomem *addr; member in struct:event_dev
49 type = __raw_readl(edev->addr + REG_READ);
50 code = __raw_readl(edev->addr + REG_READ);
51 value = __raw_readl(edev->addr + REG_READ);
61 void __iomem *addr = edev->addr; local
66 __raw_writel(PAGE_EVBITS | type, addr + REG_SET_PAGE);
68 size = __raw_readl(addr + REG_LEN) * 8;
72 addr += REG_DATA;
74 val = __raw_readb(addr
84 void __iomem *addr = edev->addr; local
115 void __iomem *addr; local
[all...]
/drivers/media/usb/usbvision/
H A Dusbvision-i2c.c51 static int usbvision_i2c_write(struct usb_usbvision *usbvision, unsigned char addr, char *buf,
53 static int usbvision_i2c_read(struct usb_usbvision *usbvision, unsigned char addr, char *buf,
57 unsigned char addr, int retries)
66 ret = (usbvision_i2c_write(usbvision, addr, buf, 1));
75 PDEBUG(DBG_I2C, "Needed %d retries for address %#2x", i, addr);
82 unsigned char addr, int retries)
90 ret = (usbvision_i2c_read(usbvision, addr, buf, 1));
99 PDEBUG(DBG_I2C, "Needed %d retries for address %#2x", i, addr);
111 unsigned char addr; local
114 addr
56 try_write_address(struct i2c_adapter *i2c_adap, unsigned char addr, int retries) argument
81 try_read_address(struct i2c_adapter *i2c_adap, unsigned char addr, int retries) argument
136 unsigned char addr = 0; local
276 usbvision_i2c_read_max4(struct usb_usbvision *usbvision, unsigned char addr, char *buf, short len) argument
340 usbvision_i2c_write_max4(struct usb_usbvision *usbvision, unsigned char addr, const char *buf, short len) argument
400 usbvision_i2c_write(struct usb_usbvision *usbvision, unsigned char addr, char *buf, short len) argument
422 usbvision_i2c_read(struct usb_usbvision *usbvision, unsigned char addr, char *buf, short len) argument
[all...]
/drivers/gpu/drm/nouveau/core/subdev/bus/
H A Dhwsq.h15 u32 addr[2]; member in struct:hwsq_reg
25 .addr = { addr1, addr2 },
31 hwsq_reg(u32 addr) argument
33 return hwsq_reg2(addr, addr);
66 reg->data = nv_rd32(ram->subdev, reg->addr[0]);
75 if (reg->addr[0] != reg->addr[1])
76 nouveau_hwsq_wr32(ram->hwsq, reg->addr[1], reg->data);
77 nouveau_hwsq_wr32(ram->hwsq, reg->addr[
[all...]
H A Dhwsq.c30 u32 addr; member in struct:nouveau_hwsq
53 hwsq->addr = ~0;
91 nouveau_hwsq_wr32(struct nouveau_hwsq *hwsq, u32 addr, u32 data) argument
93 nv_debug(hwsq->pbus, "R[%06x] = 0x%08x\n", addr, data);
104 if ((addr & 0xffff0000) != (hwsq->addr & 0xffff0000)) {
105 hwsq_cmd(hwsq, 5, (u8[]){ 0xe0, addr, addr >> 8,
106 addr >> 16, addr >> 2
[all...]
/drivers/isdn/hisax/
H A Dteleint.c21 #define byteout(addr, val) outb(val, addr)
22 #define bytein(addr) inb(addr)
106 return (readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, offset));
113 writereg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, offset, value);
120 readfifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr,
[all...]
/drivers/net/wireless/ath/ath10k/
H A Dpci.h206 #define TARG_CPU_SPACE_TO_CE_SPACE(ar, pci_addr, addr) \
209 0x100000 | ((addr) & 0xfffff))
240 static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr) argument
242 return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
245 static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val) argument
247 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
250 static inline u32 ath10k_pci_reg_read32(struct ath10k *ar, u32 addr) argument
254 return ioread32(ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS + addr);
257 static inline void ath10k_pci_reg_write32(struct ath10k *ar, u32 addr, u32 val) argument
261 iowrite32(val, ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS + addr);
[all...]
/drivers/memstick/host/
H A Dtifm_ms.c102 while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
105 *(unsigned int *)(buf + off) = __raw_readl(sock->addr
112 && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
113 host->io_word = readl(sock->addr + SOCK_MS_DATA);
141 && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
142 writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
143 sock->addr + SOCK_MS_SYSTEM);
144 writel(host->io_word, sock->addr + SOCK_MS_DATA);
154 while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
157 writel(TIFM_MS_SYS_FDIR | readl(sock->addr
[all...]
/drivers/net/dsa/
H A Dmv88e6171.c173 int addr = REG_PORT(p); local
181 val = REG_READ(addr, 0x01);
183 REG_WRITE(addr, 0x01, val | 0x003e);
185 REG_WRITE(addr, 0x01, val | 0x0003);
191 REG_WRITE(addr, 0x02, 0x0000);
218 REG_WRITE(addr, 0x04, val);
223 REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
235 REG_WRITE(addr, 0x06, val);
240 REG_WRITE(addr, 0x07, 0x0000);
250 REG_WRITE(addr,
330 int addr = mv88e6171_port_to_phy_addr(port); local
339 int addr = mv88e6171_port_to_phy_addr(port); local
[all...]
H A Dmv88e6123_61_65.c179 int addr = REG_PORT(p); local
188 REG_WRITE(addr, 0x01, 0x003e);
190 REG_WRITE(addr, 0x01, 0x0003);
196 REG_WRITE(addr, 0x02, 0x0000);
223 REG_WRITE(addr, 0x04, val);
228 REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);
240 REG_WRITE(addr, 0x06, val);
245 REG_WRITE(addr, 0x07, 0x0000);
255 REG_WRITE(addr, 0x08, 0x2080);
258 REG_WRITE(addr,
332 int addr = mv88e6123_61_65_port_to_phy_addr(port); local
340 int addr = mv88e6123_61_65_port_to_phy_addr(port); local
[all...]
/drivers/net/wireless/ti/wlcore/
H A Dio.h54 int wlcore_translate_addr(struct wl1271 *wl, int addr);
57 static inline int __must_check wlcore_raw_write(struct wl1271 *wl, int addr, argument
65 addr != HW_ACCESS_ELP_CTRL_REG)))
68 ret = wl->if_ops->write(wl->dev, addr, buf, len, fixed);
75 static inline int __must_check wlcore_raw_read(struct wl1271 *wl, int addr, argument
83 addr != HW_ACCESS_ELP_CTRL_REG)))
86 ret = wl->if_ops->read(wl->dev, addr, buf, len, fixed);
107 static inline int __must_check wlcore_raw_read32(struct wl1271 *wl, int addr, argument
112 ret = wlcore_raw_read(wl, addr, wl->buffer_32,
123 static inline int __must_check wlcore_raw_write32(struct wl1271 *wl, int addr, argument
131 wlcore_read(struct wl1271 *wl, int addr, void *buf, size_t len, bool fixed) argument
141 wlcore_write(struct wl1271 *wl, int addr, void *buf, size_t len, bool fixed) argument
170 int addr; local
180 wlcore_read32(struct wl1271 *wl, int addr, u32 *val) argument
186 wlcore_write32(struct wl1271 *wl, int addr, u32 val) argument
[all...]
H A Dio.c69 int wlcore_translate_addr(struct wl1271 *wl, int addr) argument
83 if ((addr >= part->mem.start) &&
84 (addr < part->mem.start + part->mem.size))
85 return addr - part->mem.start;
86 else if ((addr >= part->reg.start) &&
87 (addr < part->reg.start + part->reg.size))
88 return addr - part->reg.start + part->mem.size;
89 else if ((addr >= part->mem2.start) &&
90 (addr < part->mem2.start + part->mem2.size))
91 return addr
[all...]
/drivers/hwmon/
H A Dsch56xx-common.c68 u16 addr; member in struct:sch56xx_watchdog_data
112 static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v) argument
127 val = inb(addr + 1);
128 outb(val, addr + 1);
131 outb(0x00, addr + 2);
132 outb(0x80, addr + 3);
135 outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */
136 outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */
137 outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */
141 outb(v, addr
207 sch56xx_read_virtual_reg(u16 addr, u16 reg) argument
213 sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val) argument
219 sch56xx_read_virtual_reg16(u16 addr, u16 reg) argument
236 sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg, int high_nibble) argument
422 sch56xx_watchdog_register(struct device *parent, u16 addr, u32 revision, struct mutex *io_lock, int check_enabled) argument
[all...]
/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac_lib.c222 void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], argument
227 data = (addr[5] << 8) | addr[4];
233 data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
250 void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr, argument
260 addr[0] = lo_addr & 0xff;
261 addr[
[all...]
/drivers/net/ethernet/8390/
H A Detherh.c173 void __iomem *addr; local
181 addr = (void __iomem *)dev->base_addr + EN0_RCNTHI;
185 writeb((readb(addr) & 0xf8) | 1, addr);
188 writeb((readb(addr) & 0xf8), addr);
216 void __iomem *addr; local
222 addr = (void __iomem *)dev->base_addr + EN0_RCNTHI;
228 stat = readb(addr) & 4;
285 void __iomem *addr local
314 void __iomem *dma_base, *addr; local
379 void __iomem *dma_base, *addr; local
419 void __iomem *dma_base, *addr; local
520 etherh_addr(char *addr, struct expansion_card *ec) argument
555 etherm_addr(char *addr) argument
[all...]

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