Searched refs:DMA21_IRQ_STATUS (Results 1 - 3 of 3) sorted by relevance

/arch/blackfin/mach-bf609/include/mach/
H A DdefBF60x_base.h1971 #define DMA21_IRQ_STATUS 0xFFC09030 /* DMA21 Status Register */ macro
2535 #define MDMA0_SRC_CRC0_IRQ_STATUS (DMA21_IRQ_STATUS)
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h850 #define DMA21_IRQ_STATUS 0xffc01e68 /* DMA Channel 21 Interrupt/Status Register */ macro
H A DcdefBF54x_base.h1442 #define bfin_read_DMA21_IRQ_STATUS() bfin_read16(DMA21_IRQ_STATUS)
1443 #define bfin_write_DMA21_IRQ_STATUS(val) bfin_write16(DMA21_IRQ_STATUS, val)

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