Searched refs:EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG (Results 1 - 2 of 2) sorted by relevance
| /arch/arm/mach-exynos/ | ||
| H A D | regs-pmu.h | 248 #define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG 0x1220 macro |
| H A D | pmu.c | 272 { EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG, { 0x1, 0x0, 0x0} }, |
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