Searched refs:GLIU_MSR_REG (Results 1 - 5 of 5) sorted by relevance
/arch/mips/loongson/common/cs5536/ |
H A D | cs5536_acc.c | 25 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); 30 _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); 50 _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM1), hi, lo); 77 _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); 81 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); 111 _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo);
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H A D | cs5536_ide.c | 25 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); 30 _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); 61 _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM2), hi, lo); 114 _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
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H A D | cs5536_ehci.c | 59 _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM4), hi, lo);
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H A D | cs5536_ohci.c | 59 _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo);
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/arch/mips/include/asm/mach-loongson/cs5536/ |
H A D | cs5536.h | 30 #define GLIU_MSR_REG(offset) (CS5536_GLIU_MSR_BASE | (offset)) macro
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