Searched refs:PLL0 (Results 1 - 3 of 3) sorted by relevance

/arch/arm/mach-w90x900/
H A Dclksel.c27 #define PLL0 0x00 macro
78 clkval = PLL0;
/arch/avr32/mach-at32ap/
H A Dclock.c252 seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
H A Dat32ap700x.c198 control = pm_readl(PLL0);
2281 if (pm_readl(PLL0) & PM_BIT(PLLOSC))

Completed in 72 milliseconds