Searched refs:R2 (Results 1 - 25 of 40) sorted by relevance

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/arch/blackfin/lib/
H A Dudivsi3.S23 R2 = R1 << 16; define
24 CC = R2 <= R0 (IU);
27 R2 = R0 >> 31; /* if X is a 31-bit number */ define
29 R2 = R2 | R3; /* then it's okay to use the DIVQ builtins (fallthrough to fast)*/ define
30 CC = R2;
90 R2 = R0 >> 16; define
92 R2 = R3 - R2; /* shifted divisor < upper 16 bits of dividend */ define
103 /* Test for common identities. Value to be returned is placed in R2
112 R2 = R2.L (Z); define
129 R2 = R1 >> 1; define
136 R2 = R0 >> 1; define
137 R2 = R0 >> 1; define
151 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
176 R2 = R2 + R6; /* if yes, add one to quotient(Q) */ define
185 R2 = 0; define
187 R2 = -1 (X); /* X/0 => 0xFFFFFFFF */ define
190 R2 = -R2; /* R2 now 1 */ define
193 R2 = R0; /* X/1 => X */ define
213 R2 = R0 >> 31; define
233 R2 = R0; define
262 R2 = R3; /* Preserve Q */ define
264 R2 = R0 - R2; /* E = X - M */ define
270 R2 = R2 >> 16; /* E >> 16 */ define
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H A Dmemset.S21 * R2 = count
28 P2 = R2 ; /* P2 = count */
29 R3 = R0 + R2; /* end */
30 CC = R2 <= 7(IU);
33 R2 = 3; define
34 R2 = R0 & R2; /* addr bottom two bits */ define
35 CC = R2 == 0; /* AZ set if zero. */
40 R2 = R1 << 8; /* create quad filler */ define
41 R2
54 R2 = R3; /* end point */ define
56 R2 = R2 - R3; /* bytes left */ define
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H A Ddivsi3.S22 * Registers Used : R2-R7,P0-P2
84 ** If the identity is true, return the value in R2.
100 R2.L = ONES R1;
101 R2 = R2.L (Z); define
102 CC = R2 == 1;
112 R2 = -R1; define
113 [--SP] = R2;
114 R2 = R0 << 1; /* R2 ls define
119 R2 = R2 | R5; /* Shift quotient bit */ define
124 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
149 R2 = -1 (X); define
154 R2 = 1 (Z); define
157 R2 = R0; /* assume divide by 1 => numerator */ define
162 R2 = -R2; define
180 R2 = R0 >> 31; define
190 R2 = -R0; // negate result if necessary define
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H A Dsmulsi3_highpart.S18 R2 = R1.L * R0.L (FU); define
22 R1.L = R2.H + R1.L;
24 R2 = cc; define
31 R1 = R1 + R2;
32 R2 = cc; define
33 R1 = R1 + R2;
H A Dmuldi3.S18 R1:R0 * R3:R2
19 = R1.h:R1.l:R0.h:R0.l * R3.h:R3.l:R2.h:R2.l
22 [X] + (R1.h * R2.h + R1.l * R3.l + R3.h * R0.h) * 2^64
23 [T1] + (R1.h * R2.l + R3.h * R0.l + R1.l * R2.h + R3.l * R0.h) * 2^48
24 [T2] + (R1.l * R2.l + R3.l * R0.l + R0.h * R2.h) * 2^32
25 [T3] + (R0.l * R2.h + R2
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H A Douts.S16 CC = R2 == 0;
20 P2 = R2; /* P2 = count */
29 CC = R2 == 0;
33 P2 = R2; /* P2 = count */
42 CC = R2 == 0;
46 P2 = R2; /* P2 = count */
55 CC = R2 == 0;
59 P2 = R2; /* P2 = count */
H A Dstrncpy.S13 * R2 = size
27 CC = R2 == 0;
30 P2 = R2 ; /* size */
49 R2 = LC0; define
50 CC = R2
57 CC = R2 < R3;
60 R2 += -1;
65 * R2 = count (set above)
H A Dmemcmp.S12 * R2 = count (n)
25 P2 = R2 ; /* P2 = count */
26 CC = R2 <= 7(IU);
36 R2 = R2 & R3; /* remainder */ define
37 P2 = R2; /* set remainder */
H A Dstrncmp.S12 * R2 = size (n)
25 CC = R2 == 0;
37 R2 += -1; /* no, adjust count */
38 CC = R2 == 0;
H A Dmemmove.S15 * R2 = count
23 P2 = R2; /* P2 = count */
29 R3 = R1 + R2;
34 CC = R2 <= R3;
45 R2 = R2 & R3; /* remainder */ define
46 P2 = R2; /* set remainder */
H A Dmemchr.S12 * R2 = count (n)
23 P2 = R2; /* P2 = count */
25 CC = R2 == 0;
H A Dmemcpy.S18 * R2 = count
32 CC = R2 <= 0; /* length not positive? */
37 P2 = R2 ; /* length */
42 R3 = R1 + R2;
61 P2 = R2;
89 R3 = R2 & R3;
H A Dumulsi3_highpart.S18 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU); define
28 R0 = R1 + R2;
H A Dins.S79 P2 = R2; /* P2 = count */ \
/arch/blackfin/mach-common/
H A Ddpmc_modes.S25 CLI R2;
28 STI R2;
34 R2 = IWR_DISABLE_ALL; define
73 R2 = IWR_DISABLE_ALL; define
83 CLI R2;
97 P5 = R2;
101 R2 = IWR_DISABLE_ALL; define
128 R2 = 0x0404(Z); define
129 R1 = R1|R2;
131 R2 define
156 R2 = IWR_DISABLE_ALL; define
196 R2 = [P0]; define
201 R2 = [P0]; define
210 R2 = [P0]; define
216 R2 = w[P1]; define
221 R2 = [P0]; define
234 R2 = [P0]; define
242 R2 = [P0]; define
248 R2 = [P0]; define
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H A Dcache.S31 R2 = -L1_CACHE_BYTES; define
34 R0 = R0 & R2;
38 R1 = R1 & R2;
42 R2 = R1 - R0; define
43 R2 >>= L1_CACHE_SHIFT;
44 P1 = R2;
/arch/x86/crypto/
H A Dtwofish-x86_64-asm_64.S52 #define R2 %rcx define
239 encrypt_round(R0,R1,R2,R3,0);
240 encrypt_round(R2,R3,R0,R1,8);
241 encrypt_round(R0,R1,R2,R3,2*8);
242 encrypt_round(R2,R3,R0,R1,3*8);
243 encrypt_round(R0,R1,R2,R3,4*8);
244 encrypt_round(R2,R3,R0,R1,5*8);
245 encrypt_round(R0,R1,R2,R3,6*8);
246 encrypt_round(R2,R3,R0,R1,7*8);
247 encrypt_round(R0,R1,R2,R
[all...]
H A Dtwofish-i586-asm_32.S244 encrypt_round(R0,R1,R2,R3,0);
245 encrypt_round(R2,R3,R0,R1,8);
246 encrypt_round(R0,R1,R2,R3,2*8);
247 encrypt_round(R2,R3,R0,R1,3*8);
248 encrypt_round(R0,R1,R2,R3,4*8);
249 encrypt_round(R2,R3,R0,R1,5*8);
250 encrypt_round(R0,R1,R2,R3,6*8);
251 encrypt_round(R2,R3,R0,R1,7*8);
252 encrypt_round(R0,R1,R2,R3,8*8);
253 encrypt_round(R2,R
[all...]
H A Daes-x86_64-asm_64.S26 #define R2 %rbx define
134 prologue(FUNC,KEY,B128,B192,R2,R8,R7,R9,R1,R3,R4,R6,R10,R5,R11)
136 #define return(FUNC) epilogue(FUNC,R8,R2,R9,R7,R5,R6,R3,R4,R11)
139 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4) \
140 move_regs(R1,R2,R5,R6)
143 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4)
146 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4) \
147 move_regs(R1,R2,R5,R6)
150 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4)
/arch/parisc/kernel/
H A Dunaligned.c120 #define R2(i) (((i)>>16)&0x1f) macro
508 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift;
510 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0);
557 ret = emulate_sth(regs, R2(regs->iir));
562 ret = emulate_stw(regs, R2(regs->iir),0);
575 ret = emulate_std(regs, R2(regs->iir),0);
619 ret = emulate_ldd(regs,R2(regs->iir),1);
623 ret = emulate_std(regs, R2(reg
[all...]
/arch/hexagon/kernel/
H A Dvm_entry.S74 R2.H = #HI(_THREAD_SIZE); } \
77 R2.L = #LO(_THREAD_SIZE); } \
80 R2 = neg(R2); } \ define
83 R2 = and(R0,R2); } \ define
85 THREADINFO_REG = R2; } \
88 R2 = #-1; } \ define
89 { memw(R0 + #_PT_SYSCALL_NR) = R2; \
125 R2 define
[all...]
/arch/blackfin/mach-bf609/
H A Ddpm.S136 R2.H = .Lpm_resume_here;
137 R2.L = .Lpm_resume_here;
139 [P0++] = R2;
/arch/s390/kernel/
H A Dsclp.S25 # R2 = 0 for no timeout, non-zero for timeout in (approximated) seconds
28 # R2 = 0 on interrupt, 2 on timeout
29 # R3 = external interruption parameter if R2=0
110 # R2 = command word
114 # R2 = 0 on success, 1 on failure
115 # R3 = sccb response code if R2 = 0
144 # R2 = 0 to activate, non-zero to deactivate
147 # R2 = 0 on success, non-zero on failure
204 # R2 = address of nil-terminated ASCII text
207 # R2
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/arch/blackfin/mach-bf561/
H A Dsecondary.S140 CLI R2;
143 STI R2;
/arch/blackfin/kernel/
H A Dfixed_code.S50 * R2: new value to store
59 [P0] = R2;

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