Searched refs:S5P_CMU_RESET_LOWPWR (Results 1 - 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
H A Dpmu.c33 { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
114 { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
H A Dregs-pmu.h49 #define S5P_CMU_RESET_LOWPWR 0x110C macro

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