Searched refs:S5P_CMU_SCLKSTOP_LOWPWR (Results 1 - 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
H A Dpmu.c32 { S5P_CMU_SCLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } },
113 { S5P_CMU_SCLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } },
H A Dregs-pmu.h48 #define S5P_CMU_SCLKSTOP_LOWPWR 0x1104 macro

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