Searched refs:X1241REG_SR_WEL (Results 1 - 1 of 1) sorted by relevance

/arch/mips/sibyte/swarm/
H A Drtc_xicor1241.c33 #define X1241REG_SR_WEL 0x02 /* r/w latch is unlocked, can enable r/w now */ macro
123 xicor_write(X1241REG_SR, X1241REG_SR_WEL);
124 xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL);

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