Searched refs:clk_rate (Results 1 - 4 of 4) sorted by relevance

/arch/m68k/include/asm/
H A Dmcfclk.h32 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
36 .rate = clk_rate, \
43 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
46 .rate = clk_rate, \
/arch/mips/jz4740/
H A Dtime.c109 uint32_t clk_rate; local
114 clk_rate = jz4740_clock_bdata.ext_rate >> 4;
115 jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
117 clockevent_set_clock(&jz4740_clockevent, clk_rate);
124 ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
/arch/arm/mach-msm/
H A Dboard-trout-panel.c240 .clk_rate = 122880000,
249 .clk_rate = 0,
/arch/blackfin/kernel/
H A Dsetup.c900 u_long clk_rate; local
906 clk_rate = clk_get_rate(clk);
908 return clk_rate;

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