Searched refs:csr_in32 (Results 1 - 3 of 3) sorted by relevance

/arch/mips/sibyte/common/
H A Dbus_watcher.c86 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
89 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG));
93 status = csr_in32(IOADDR(A_BCM1480_BUS_ERR_STATUS_DEBUG));
103 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
104 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
201 stats->status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
204 stats->l2_err = cntr = csr_in32(IOADDR(A_BUS_L2_ERRORS));
211 stats->memio_err = cntr = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
/arch/mips/mm/
H A Dcerr-sb1.c152 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
155 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
159 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
/arch/mips/include/asm/
H A Dio.h620 #define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST)) macro

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