Searched refs:dcr (Results 1 - 25 of 65) sorted by relevance

123

/arch/sh/drivers/dma/
H A Ddmabrg.c87 unsigned long dcr; local
90 dcr = __raw_readl(DMABRGCR);
91 __raw_writel(dcr & ~0x00ff0003, DMABRGCR); /* ack all */
92 dcr &= dcr >> 8; /* ignore masked */
95 if (dcr & 1)
97 if (dcr & 2)
101 dcr >>= 16;
102 while (dcr) {
103 i = __ffs(dcr);
112 unsigned long dcr; local
120 unsigned long dcr; local
[all...]
/arch/powerpc/sysdev/
H A Ddcr-low.S40 dcr = 1 define
42 mfdcr r3,dcr; blr
43 mtdcr dcr,r4; blr
44 dcr = dcr + 1 define
/arch/powerpc/boot/dts/
H A Diss4xx-mpic.dts24 dcr-parent = <&{/cpus/cpu@0}>;
44 dcr-controller;
45 dcr-access-method = "native";
58 dcr-controller;
59 dcr-access-method = "native";
74 dcr-controller;
75 dcr-access-method = "native";
90 dcr-controller;
91 dcr-access-method = "native";
107 dcr
[all...]
H A Diss4xx.dts22 dcr-parent = <&{/cpus/cpu@0}>;
42 dcr-controller;
43 dcr-access-method = "native";
56 dcr-reg = <0x0c0 0x009>;
67 dcr-reg = <0x0d0 0x009>;
H A Dklondike.dts31 dcr-parent = <&{/cpus/cpu@0}>;
52 dcr-controller;
53 dcr-access-method = "native";
66 dcr-reg = <0x0c0 0x010>;
76 dcr-reg = <0x0d0 0x010>;
88 dcr-reg = <0x0e0 0x010>;
100 dcr-reg = <0x0f0 0x010>;
117 dcr-reg = <0x010 0x002>;
122 dcr-reg = <0x180 0x062>;
143 dcr
[all...]
H A Darches.dts38 dcr-parent = <&{/cpus/cpu@0}>;
61 dcr-controller;
62 dcr-access-method = "native";
76 dcr-reg = <0x0c0 0x009>;
86 dcr-reg = <0x0d0 0x009>;
98 dcr-reg = <0x0e0 0x009>;
110 dcr-reg = <0x0f0 0x009>;
120 dcr-reg = <0x00e 0x002>;
125 dcr-reg = <0x00c 0x002>;
130 dcr
[all...]
H A Dcurrituck.dts20 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
54 dcr-controller;
55 dcr-access-method = "native";
70 dcr-reg = <0xffc00000 0x00040000>;
135 dcr-reg = <0x80 0x20>;
173 dcr-reg = <0x60 0x20>;
210 dcr-reg = <0xA0 0x20>;
H A Dkatmai.dts22 dcr-parent = <&{/cpus/cpu@0}>;
45 dcr-controller;
46 dcr-access-method = "native";
60 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x0d0 0x009>;
82 dcr-reg = <0x0e0 0x009>;
94 dcr-reg = <0x0f0 0x009>;
104 dcr-reg = <0x00e 0x002>;
109 dcr-reg = <0x00c 0x002>;
114 dcr
[all...]
H A Debony.dts21 dcr-parent = <&{/cpus/cpu@0}>;
44 dcr-controller;
45 dcr-access-method = "native";
58 dcr-reg = <0x0c0 0x009>;
69 dcr-reg = <0x0d0 0x009>;
79 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
92 dcr-reg = <0x010 0x002>;
98 dcr-reg = <0x020 0x008 0x00a 0x001>;
104 dcr-reg = <0x100 0x027>;
109 dcr
[all...]
H A Dobs600.dts22 dcr-parent = <&{/cpus/cpu@0}>;
45 dcr-controller;
46 dcr-access-method = "native";
59 dcr-reg = <0x0c0 0x009>;
69 dcr-reg = <0x0d0 0x009>;
81 dcr-reg = <0x0e0 0x009>;
91 dcr-access-method = "native";
92 dcr-reg = <0x0b0 0x003>;
107 dcr-reg = <0x010 0x002>;
122 dcr
[all...]
H A Dacadia.dts18 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
53 dcr-reg = <0x0c0 0x009>;
69 dcr-reg = <0x380 0x62>;
88 dcr-reg = <0x0a 0x05>;
180 dcr-reg = <0xe0 0x9>;
214 dcr-reg = <0x12 0x2>;
H A Dep405.dts19 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x010 0x002>;
75 dcr-reg = <0x180 0x062>;
92 dcr-reg = <0x0a0 0x005>;
154 dcr-reg = <0x012 0x002>;
H A Dwalnut.dts19 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x010 0x002>;
75 dcr-reg = <0x180 0x062>;
92 dcr-reg = <0x0a0 0x005>;
153 dcr-reg = <0x012 0x002>;
H A Dicon.dts18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
56 dcr-reg = <0x0c0 0x009>;
66 dcr-reg = <0x0d0 0x009>;
78 dcr-reg = <0x0e0 0x009>;
90 dcr-reg = <0x0f0 0x009>;
100 dcr-reg = <0x00e 0x002>;
105 dcr-reg = <0x00c 0x002>;
110 dcr
[all...]
H A Dbamboo.dts21 dcr-parent = <&{/cpus/cpu@0}>;
46 dcr-controller;
47 dcr-access-method = "native";
60 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x0d0 0x009>;
80 dcr-reg = <0x00e 0x002>;
85 dcr-reg = <0x00c 0x002>;
97 dcr-reg = <0x010 0x002>;
102 dcr-reg = <0x100 0x027>;
107 dcr
[all...]
H A Dhaleakala.dts18 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
54 dcr-reg = <0x0c0 0x009>;
64 dcr-reg = <0x0d0 0x009>;
76 dcr-reg = <0x0e0 0x009>;
93 dcr-reg = <0x010 0x002>;
101 dcr-reg = <0x180 0x062>;
124 dcr-reg = <0x0a0 0x005>;
129 dcr
[all...]
H A Dwarp.dts19 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
54 dcr-reg = <0x0c0 0x009>;
64 dcr-reg = <0x0d0 0x009>;
74 dcr-reg = <0x00e 0x002>;
79 dcr-reg = <0x00c 0x002>;
91 dcr-reg = <0x010 0x002>;
96 dcr-reg = <0x100 0x027>;
101 dcr
[all...]
H A Dyosemite.dts19 dcr-parent = <&{/cpus/cpu@0}>;
44 dcr-controller;
45 dcr-access-method = "native";
58 dcr-reg = <0x0c0 0x009>;
68 dcr-reg = <0x0d0 0x009>;
78 dcr-reg = <0x00e 0x002>;
83 dcr-reg = <0x00c 0x002>;
95 dcr-reg = <0x010 0x002>;
100 dcr-reg = <0x100 0x027>;
105 dcr
[all...]
H A Dsam440ep.dts47 dcr-controller;
48 dcr-access-method = "native";
61 dcr-reg = <0x0c0 9>;
71 dcr-reg = <0x0d0 9>;
81 dcr-reg = <0x00e 2>;
86 dcr-reg = <0x00c 2>;
98 dcr-reg = <0x010 2>;
103 dcr-reg = <0x100 0x027>;
108 dcr-reg = <0x180 0x062>;
138 dcr
[all...]
H A Dredwood.dts18 dcr-parent = <&{/cpus/cpu@0}>;
39 dcr-controller;
40 dcr-access-method = "native";
53 dcr-reg = <0x0c0 0x009>;
63 dcr-reg = <0x0d0 0x009>;
75 dcr-reg = <0x0e0 0x009>;
87 dcr-reg = <0x0f0 0x009>;
97 dcr-reg = <0x00e 0x002>;
102 dcr-reg = <0x00c 0x002>;
114 dcr
[all...]
H A Dtaishan.dts20 dcr-parent = <&{/cpus/cpu@0}>;
43 dcr-controller;
44 dcr-access-method = "native";
58 dcr-reg = <0x200 0x009>;
69 dcr-reg = <0x0c0 0x009>;
82 dcr-reg = <0x0d0 0x009>;
94 dcr-reg = <0x210 0x009>;
105 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
128 dcr
[all...]
H A Dbluestone.dts31 dcr-parent = <&{/cpus/cpu@0}>;
53 dcr-controller;
54 dcr-access-method = "native";
68 dcr-reg = <0x0c0 0x009>;
78 dcr-reg = <0x0d0 0x009>;
90 dcr-reg = <0x0e0 0x009>;
102 dcr-reg = <0x0f0 0x009>;
120 dcr-reg = <0x00e 0x002>;
125 dcr-reg = <0x00c 0x002>;
130 dcr
[all...]
H A Dkilauea.dts18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
65 dcr-reg = <0x0d0 0x009>;
77 dcr-reg = <0x0e0 0x009>;
87 dcr-access-method = "native";
88 dcr-reg = <0x0b0 0x003>;
103 dcr-reg = <0x010 0x002>;
118 dcr
[all...]
H A Dcanyonlands.dts18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
56 dcr-reg = <0x0c0 0x009>;
66 dcr-reg = <0x0d0 0x009>;
78 dcr-reg = <0x0e0 0x009>;
90 dcr-reg = <0x0f0 0x009>;
100 dcr-reg = <0x00e 0x002>;
105 dcr-reg = <0x00c 0x002>;
110 dcr
[all...]
/arch/powerpc/include/asm/
H A Ddcr.h27 #include <asm/dcr-native.h>
31 #include <asm/dcr-mmio.h>
39 #include <asm/dcr-generic.h>

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