Searched refs:devfn (Results 1 - 25 of 201) sorted by relevance

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/arch/mips/pci/
H A Dpci-lantiq.h14 unsigned int devfn, int where, int size, u32 *val);
16 unsigned int devfn, int where, int size, u32 val);
H A Dops-rc32434.c47 struct pci_bus *bus, unsigned int devfn,
50 unsigned int slot = PCI_SLOT(devfn);
51 u8 func = PCI_FUNC(devfn);
72 static int read_config_byte(struct pci_bus *bus, unsigned int devfn, argument
78 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
83 static int read_config_word(struct pci_bus *bus, unsigned int devfn, argument
89 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
94 static int read_config_dword(struct pci_bus *bus, unsigned int devfn, argument
104 if (bus->number == 0 && PCI_SLOT(devfn) > 21)
108 ret = config_access(PCI_ACCESS_READ, bus, devfn, wher
46 config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned char where, u32 *data) argument
129 write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val) argument
148 write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val) argument
168 write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) argument
177 pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument
190 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
[all...]
H A Dops-sni.c24 static int set_config_address(unsigned int busno, unsigned int devfn, int reg) argument
26 if ((devfn > 255) || (reg > 255))
29 if (busno == 0 && devfn >= PCI_DEVFN(8, 0))
34 ((devfn & 0xff) << 8) |
40 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg, argument
45 if ((res = set_config_address(bus->number, devfn, reg)))
63 static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, argument
68 if ((res = set_config_address(bus->number, devfn, reg)))
91 static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int reg) argument
93 if ((devfn > 25
100 pcit_read(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 * val) argument
137 pcit_write(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) argument
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H A Dops-emma2rh.c40 static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num) argument
51 if (PCI_SLOT(devfn) >= 10)
55 if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16))
62 unsigned int devfn, int where)
71 config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9);
76 config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) |
84 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, argument
94 if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
99 if (set_pci_configuration_address(bus_num, devfn, where) < 0)
103 *(volatile u32 *)(base + (PCI_FUNC(devfn) <<
61 set_pci_configuration_address(unsigned char bus_num, unsigned int devfn, int where) argument
129 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
[all...]
H A Dops-gt64xxx_pci0.c43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
48 if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))
58 (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
63 if (busnum == 0 && PCI_SLOT(devfn) == 0) {
72 if (busnum == 0 && PCI_SLOT(devfn) == 0) {
103 static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument
108 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
122 static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument
131 devfn, where, &data))
142 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn,
42 gt64xxx_pci0_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument
[all...]
H A Dops-vr41xx.c36 unsigned int devfn, int where)
42 if (PCI_SLOT(devfn) < 11 || where > 0xff)
45 writel((1U << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) |
54 writel(((uint32_t)number << 16) | ((devfn & 0xff) << 8) |
61 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, argument
67 if (set_pci_configuration_address(bus->number, devfn, where) < 0)
89 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, argument
95 if (set_pci_configuration_address(bus->number, devfn, where) < 0)
35 set_pci_configuration_address(unsigned char number, unsigned int devfn, int where) argument
H A Dops-loongson2.c37 unsigned int devfn, int where,
44 int device = PCI_SLOT(devfn);
45 int function = PCI_FUNC(devfn);
121 static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument
131 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
145 static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument
158 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
170 if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
190 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); local
194 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADD
35 loongson_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) argument
206 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); local
[all...]
H A Dops-nile4.c19 struct pci_bus *bus, unsigned int devfn, int where, u32 *val)
24 if ((busnum == 0) && (PCI_SLOT(devfn) > 8))
30 if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) {
53 ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8)
56 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) |
76 static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument
89 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
106 static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument
119 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, wher
18 nile4_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *val) argument
[all...]
H A Dops-loongson3.c16 struct pci_bus *bus, unsigned int devfn,
22 int device = PCI_SLOT(devfn);
23 int function = PCI_FUNC(devfn);
50 static int loongson3_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument
55 bus, devfn, where, &data);
70 static int loongson3_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument
80 bus, devfn, where, &data);
93 bus, devfn, where, &data);
15 loongson3_pci_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) argument
H A Dops-mace.c31 static inline int mkaddr(struct pci_bus *bus, unsigned int devfn, argument
35 ((devfn & 0xff) << 8) |
41 mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, argument
48 mace->pci.config_addr = mkaddr(bus, devfn, reg);
68 (devfn == (1 << 3) || devfn == (2 << 3)))
77 mace_pci_write_config(struct pci_bus *bus, unsigned int devfn, argument
80 mace->pci.config_addr = mkaddr(bus, devfn, reg);
H A Dops-msc.c47 struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
58 (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) |
59 (PCI_FUNC(devfn) << MSC01_PCI_CFGADDR_FNUM_SHF) |
88 static int msc_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument
98 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
112 static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument
125 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
137 if (msc_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
46 msc_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument
H A Dops-lantiq.c29 unsigned int devfn, unsigned int where, u32 *data)
37 if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
38 || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
44 cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn <<
73 int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, argument
78 if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
91 int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, argument
100 devfn, where, &data))
111 if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, wher
28 ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data) argument
[all...]
H A Dpci-xlp.c60 #define pci_cfg_addr(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
63 static inline u32 pci_cfg_read_32bit(struct pci_bus *bus, unsigned int devfn, argument
74 if (PCI_SLOT(devfn) != 0 ||
75 !nlm_node_present(PCI_FUNC(devfn)))
78 if (PCI_SLOT(devfn) == 0) /* b.0.0 hangs */
80 if (devfn == 44) /* b.5.4 hangs */
83 } else if (bus->number == 0 && PCI_SLOT(devfn) == 1 && where == 0x954) {
87 pci_cfg_addr(bus->number, devfn, where));
92 static inline void pci_cfg_write_32bit(struct pci_bus *bus, unsigned int devfn, argument
102 nlm_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument
125 nlm_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
[all...]
H A Dfixup-rc32434.c43 if (dev->bus->number < 2 && PCI_SLOT(dev->devfn) < 12)
44 irq = irq_map[dev->bus->number][PCI_SLOT(dev->devfn)];
51 if (PCI_SLOT(dev->devfn) == 6 && dev->bus->number == 0) {
H A Dpci-bcm1480.c53 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
54 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
97 static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) argument
105 devno = PCI_SLOT(devfn);
120 static int bcm1480_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument
130 if (bcm1480_pci_can_access(bus, devfn))
131 data = READCFG32(CFGADDR(bus, devfn, where));
145 static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument
[all...]
/arch/x86/pci/
H A Dlegacy.c39 int devfn; local
45 for (devfn = 0; devfn < 256; devfn += 8) {
46 if (!raw_pci_read(0, busn, devfn, PCI_VENDOR_ID, 2, &l) &&
48 DBG("Found device at %02x:%02x [%04x]\n", busn, devfn, l);
H A Dnumachip.c21 static inline char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) argument
26 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12));
31 unsigned int devfn, int reg, int len, u32 *value)
36 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {
42 if (unlikely(bus == 0 && devfn >= limit)) {
48 addr = pci_dev_base(seg, bus, devfn);
71 unsigned int devfn, int reg, int len, u32 value)
76 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
80 if (unlikely(bus == 0 && devfn >= limit))
84 addr = pci_dev_base(seg, bus, devfn);
30 pci_mmcfg_read_numachip(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument
70 pci_mmcfg_write_numachip(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument
[all...]
H A Dintel_mid_pci.c52 * @devfn: device in question
54 * Look for the fixed BAR cap on @bus and @devfn, returning its offset
57 static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn) argument
69 devfn, pos, 4, &pcie_cap))
78 devfn, pos + 4, 4, &cap_data); local
89 static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn, argument
102 raw_pci_ext_ops->read(domain, busnum, devfn,
125 return raw_pci_ext_ops->write(domain, busnum, devfn, reg, 4,
130 return raw_pci_ext_ops->write(domain, busnum, devfn, reg, len, val);
136 * @devfn
143 type1_access_ok(unsigned int bus, unsigned int devfn, int reg) argument
162 pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) argument
172 pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument
[all...]
H A Dmmconfig_32.c28 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) argument
40 static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) argument
42 u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12);
53 unsigned int devfn, int reg, int len, u32 *value)
58 if ((bus > 255) || (devfn > 255) || (reg > 4095)) {
64 base = get_base_addr(seg, bus, devfn);
72 pci_exp_set_dev_base(base, bus, devfn);
92 unsigned int devfn, int reg, int len, u32 value)
97 if ((bus > 255) || (devfn > 255) || (reg > 4095))
101 base = get_base_addr(seg, bus, devfn);
52 pci_mmcfg_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument
91 pci_mmcfg_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument
[all...]
H A Ddirect.c16 #define PCI_CONF1_ADDRESS(bus, devfn, reg) \
18 | (devfn << 8) | (reg & 0xFC))
21 unsigned int devfn, int reg, int len, u32 *value)
25 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) {
32 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
52 unsigned int devfn, int reg, int len, u32 value)
56 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095))
61 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
95 unsigned int devfn, int reg, int len, u32 *value)
101 if ((bus > 255) || (devfn > 25
20 pci_conf1_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument
51 pci_conf1_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument
94 pci_conf2_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument
136 pci_conf2_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument
197 int year, devfn; local
[all...]
/arch/powerpc/platforms/pasemi/
H A Dpci.c34 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
36 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset) argument
42 if (bus == 0 && devfn == 0)
49 u8 bus, u8 devfn, int offset)
51 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
54 static inline int is_root_port(int busno, int devfn) argument
56 return ((busno == 0) && (PCI_FUNC(devfn) < 4) &&
57 ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn)
48 pa_pxp_cfg_addr(struct pci_controller *hose, u8 bus, u8 devfn, int offset) argument
66 workaround_5945(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) argument
109 pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) argument
146 pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) argument
[all...]
/arch/mn10300/unit-asb2305/
H A Dpci.c55 #define CONFIG_CMD(bus, devfn, where) \
56 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
68 static inline int __query(const struct pci_bus *bus, unsigned int devfn) argument
71 return bus->number == 0 && (devfn == PCI_DEVFN(0, 0));
74 (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0));
82 static int pci_ampci_read_config_byte(struct pci_bus *bus, unsigned int devfn, argument
87 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
91 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
94 if (__query(bus, devfn))
102 pci_ampci_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u32 *_value) argument
122 pci_ampci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 *_value) argument
142 pci_ampci_write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 value) argument
162 pci_ampci_write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 value) argument
180 pci_ampci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 value) argument
198 pci_ampci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument
214 pci_ampci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
[all...]
/arch/arm/plat-orion/include/plat/
H A Dpcie.h25 u32 devfn, int where, int size, u32 *val);
27 u32 devfn, int where, int size, u32 *val);
29 u32 devfn, int where, int size, u32 *val);
31 u32 devfn, int where, int size, u32 val);
/arch/sh/drivers/pci/
H A Dops-dreamcast.c25 * someone implicitly messes around with the last devfn value.. otherwise we
39 static int gapspci_config_access(unsigned char bus, unsigned int devfn) argument
41 return (bus == 0) && (devfn == 0);
49 static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument
53 if (!gapspci_config_access(bus->number, devfn))
65 static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
67 if (!gapspci_config_access(bus->number, devfn))
/arch/arm/mach-cns3xxx/
H A Dpcie.c58 unsigned int devfn, int where)
62 int slot = PCI_SLOT(devfn);
75 if (devfn == 0) /* device# and function# are ignored by hw */
88 return base + (where & 0xffc) + (devfn << 12);
91 static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, argument
99 base = cns3xxx_pci_cfg_base(bus, devfn, where);
107 if (bus->number == 0 && devfn == 0 &&
123 static int cns3xxx_pci_write_config(struct pci_bus *bus, unsigned int devfn, argument
131 base = cns3xxx_pci_cfg_base(bus, devfn, where);
171 pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn),
57 cns3xxx_pci_cfg_base(struct pci_bus *bus, unsigned int devfn, int where) argument
276 u32 devfn = 0; local
[all...]

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