/arch/arm/include/asm/ |
H A D | percpu.h | 24 static inline void set_my_cpu_offset(unsigned long off) argument 27 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); 32 unsigned long off; local 40 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp)); 42 return off;
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/arch/arm64/include/asm/ |
H A D | percpu.h | 21 static inline void set_my_cpu_offset(unsigned long off) argument 23 asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory"); 28 unsigned long off; local 34 asm("mrs %0, tpidr_el1" : "=r" (off) : 37 return off;
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/arch/arm/mach-clps711x/include/mach/ |
H A D | hardware.h | 30 #define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) 31 #define clps_readw(off) readw(CLPS711X_VIRT_BASE + (off)) 32 #define clps_readl(off) readl(CLPS711X_VIRT_BASE + (off)) 33 #define clps_writeb(val,off) writeb(val, CLPS711X_VIRT_BASE + (off)) 34 #define clps_writew(val,off) writew(val, CLPS711X_VIRT_BASE + (off)) [all...] |
/arch/mips/mm/ |
H A D | page.c | 92 pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off) argument 95 if (off > 0x7fff) { 96 uasm_i_lui(buf, T9, uasm_rel_hi(off)); 97 uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off)); 99 uasm_i_addiu(buf, T9, ZERO, off); 102 if (off > 0x7fff) { 103 uasm_i_lui(buf, T9, uasm_rel_hi(off)); 104 uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off)); 107 UASM_i_ADDIU(buf, reg1, reg2, off); 202 static void build_clear_store(u32 **buf, int off) argument 211 build_clear_pref(u32 **buf, int off) argument 245 int off; local 336 build_copy_load(u32 **buf, int reg, int off) argument 345 build_copy_store(u32 **buf, int reg, int off) argument 354 build_copy_load_pref(u32 **buf, int off) argument 363 build_copy_store_pref(u32 **buf, int off) argument 392 int off; local [all...] |
/arch/arm/plat-samsung/include/plat/ |
H A D | gpio-cfg-helpers.h | 28 unsigned int off, unsigned int config) 30 return (chip->config->set_config)(chip, off, config); 34 unsigned int off) 36 return (chip->config->get_config)(chip, off); 40 unsigned int off, samsung_gpio_pull_t pull) 42 return (chip->config->set_pull)(chip, off, pull); 46 unsigned int off) 48 return chip->config->get_pull(chip, off); 62 * @off: The offset for the GPIO being configured. 69 unsigned int off, samsung_gpio_pull_ 27 samsung_gpio_do_setcfg(struct samsung_gpio_chip *chip, unsigned int off, unsigned int config) argument 33 samsung_gpio_do_getcfg(struct samsung_gpio_chip *chip, unsigned int off) argument 39 samsung_gpio_do_setpull(struct samsung_gpio_chip *chip, unsigned int off, samsung_gpio_pull_t pull) argument 45 samsung_gpio_do_getpull(struct samsung_gpio_chip *chip, unsigned int off) argument [all...] |
/arch/powerpc/boot/ |
H A D | addnote.c | 68 #define GET_16BE(off) ((buf[off] << 8) + (buf[(off)+1])) 69 #define GET_32BE(off) ((GET_16BE(off) << 16U) + GET_16BE((off)+2U)) 70 #define GET_64BE(off) ((((unsigned long long)GET_32BE(off)) << 32ULL) + \ 71 ((unsigned long long)GET_32BE((off)+4ULL))) 72 #define PUT_16BE(off, [all...] |
/arch/ia64/kernel/ |
H A D | entry.h | 27 #define PT_REGS_SAVES(off) \ 29 .fframe IA64_PT_REGS_SIZE+16+(off); \ 30 .spillsp rp, PT(CR_IIP)+16+(off); \ 31 .spillsp ar.pfs, PT(CR_IFS)+16+(off); \ 32 .spillsp ar.unat, PT(AR_UNAT)+16+(off); \ 33 .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \ 34 .spillsp pr, PT(PR)+16+(off); 36 #define PT_REGS_UNWIND_INFO(off) \ 38 PT_REGS_SAVES(off); \ 41 #define SWITCH_STACK_SAVES(off) \ [all...] |
/arch/powerpc/platforms/powernv/ |
H A D | opal-nvram.c | 31 int off; local 35 off = *index; 36 if ((off + count) > nvram_size) 37 count = nvram_size - off; 38 rc = opal_read_nvram(__pa(buf), count, off); 48 int off; local 52 off = *index; 53 if ((off + count) > nvram_size) 54 count = nvram_size - off; 57 rc = opal_write_nvram(__pa(buf), count, off); [all...] |
/arch/mips/include/asm/ |
H A D | mips-cpc.h | 75 #define BUILD_CPC_R_(name, off) \ 78 return (u32 *)(mips_cpc_base + (off)); \ 83 return __raw_readl(mips_cpc_base + (off)); \ 86 #define BUILD_CPC__W(name, off) \ 89 __raw_writel(value, mips_cpc_base + (off)); \ 92 #define BUILD_CPC_RW(name, off) \ 93 BUILD_CPC_R_(name, off) \ 94 BUILD_CPC__W(name, off) 96 #define BUILD_CPC_Cx_R_(name, off) \ 97 BUILD_CPC_R_(cl_##name, MIPS_CPC_CLCB_OFS + (off)) \ [all...] |
/arch/sh/kernel/cpu/ |
H A D | adc.c | 14 int off; local 19 off = (channel & 0x03) << 2; 32 return (((__raw_readb(ADDRAH + off) << 8) | 33 __raw_readb(ADDRAL + off)) >> 6);
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/arch/m68k/include/asm/ |
H A D | blinken.h | 22 static __inline__ void blinken_leds(int on, int off) argument 27 hp300_ledstate &= ~off;
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/arch/powerpc/include/asm/ |
H A D | fb.h | 9 unsigned long off) 11 vma->vm_page_prot = phys_mem_access_prot(file, off >> PAGE_SHIFT, 8 fb_pgprotect(struct file *file, struct vm_area_struct *vma, unsigned long off) argument
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/arch/sparc/include/uapi/asm/ |
H A D | jsflash.h | 24 __u64 off; /* 0x20000000 is included */ member in struct:jsflash_ident_arg 35 __u64 off; member in struct:jsflash_program_arg
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/arch/arm/boot/dts/ |
H A D | omap-gpmc-smsc911x.dtsi | 28 gpmc,cs-rd-off-ns = <180>; 29 gpmc,cs-wr-off-ns = <180>; 30 gpmc,adv-rd-off-ns = <18>; 31 gpmc,adv-wr-off-ns = <48>; 33 gpmc,oe-off-ns = <168>; 35 gpmc,we-off-ns = <168>;
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H A D | omap2420-h4.dts | 35 gpmc,cs-rd-off-ns = <160>; 36 gpmc,cs-wr-off-ns = <160>; 38 gpmc,adv-rd-off-ns = <50>; 39 gpmc,adv-wr-off-ns = <50>; 41 gpmc,oe-off-ns = <120>; 43 gpmc,we-off-ns = <120>;
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H A D | omap3430-sdp.dts | 67 gpmc,cs-rd-off-ns = <186>; 68 gpmc,cs-wr-off-ns = <186>; 70 gpmc,adv-rd-off-ns = <48>; 71 gpmc,adv-wr-off-ns = <48>; 73 gpmc,oe-off-ns = <168>; 75 gpmc,we-off-ns = <168>; 113 gpmc,cs-rd-off-ns = <36>; 114 gpmc,cs-wr-off-ns = <36>; 116 gpmc,adv-rd-off-ns = <24>; 117 gpmc,adv-wr-off [all...] |
H A D | omap-gpmc-smsc9221.dtsi | 33 gpmc,cs-rd-off-ns = <42>; 34 gpmc,cs-wr-off-ns = <36>; 36 gpmc,adv-rd-off-ns = <12>; 37 gpmc,adv-wr-off-ns = <12>; 39 gpmc,oe-off-ns = <42>; 41 gpmc,we-off-ns = <36>;
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H A D | omap3-igep0030.dts | 32 default-state = "off"; 38 default-state = "off"; 44 default-state = "off"; 68 gpmc,cs-rd-off-ns = <44>; 69 gpmc,cs-wr-off-ns = <44>; 71 gpmc,adv-rd-off-ns = <34>; 72 gpmc,adv-wr-off-ns = <44>; 73 gpmc,we-off-ns = <40>; 74 gpmc,oe-off-ns = <54>;
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H A D | omap3-sb-t35.dtsi | 27 gpmc,cs-rd-off-ns = <180>; 28 gpmc,cs-wr-off-ns = <180>; 29 gpmc,adv-rd-off-ns = <18>; 30 gpmc,adv-wr-off-ns = <48>; 32 gpmc,oe-off-ns = <168>; 34 gpmc,we-off-ns = <168>;
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/arch/mips/alchemy/common/ |
H A D | gpiolib.c | 120 static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off) argument 122 return au1300_gpio_get_value(off + AU1300_GPIO_BASE); 125 static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v) argument 127 au1300_gpio_set_value(off + AU1300_GPIO_BASE, v); 130 static int alchemy_gpic_dir_input(struct gpio_chip *chip, unsigned int off) argument 132 return au1300_gpio_direction_input(off + AU1300_GPIO_BASE); 135 static int alchemy_gpic_dir_output(struct gpio_chip *chip, unsigned int off, argument 138 return au1300_gpio_direction_output(off + AU1300_GPIO_BASE, v); 141 static int alchemy_gpic_gpio_to_irq(struct gpio_chip *chip, unsigned int off) argument 143 return au1300_gpio_to_irq(off [all...] |
/arch/mips/bcm47xx/ |
H A D | prom.c | 60 unsigned long off; local 77 off = CPHYSADDR((unsigned long)prom_init); 83 /* Loop condition may be not enough, off may be over 1 MiB */ 84 if (off + mem >= max) { 140 unsigned long off = (unsigned long)prom_init; local 164 off = EXTVBASE + __pa(off); 166 if (!memcmp(prom_init, (void *)(off + extmem), 16))
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/arch/unicore32/mm/ |
H A D | proc-macros.S | 88 * va2pa va, pa, tbl, msk, off, err 93 * tbl, msk, off: temp registers, will be destroyed 97 .macro va2pa, va, pa, tbl, msk, off, err=990f 99 mov \off, \va >> #22 @ off <- index of 1st page table 103 ldw \pa, [\pa+], \off << #2 @ pa <- the content of pt 106 and \off, \pa, #3 @ off <- the last 2 bits 107 add \tbl, \tbl, \off << #3 @ cmove table pointer 112 mov \off, \v [all...] |
/arch/arm/mach-ebsa110/ |
H A D | io.c | 350 u32 off; local 353 off = port << 2; 355 off = (port & ~1) << 1; 360 __raw_writesb((void __iomem *)ISAIO_BASE + off, from, len); 365 u32 off; local 368 off = port << 2; 370 off = (port & ~1) << 1; 375 __raw_readsb((void __iomem *)ISAIO_BASE + off, from, len); 383 u32 off; local 386 off 398 u32 off; local 420 u32 off = port << 1; local 430 u32 off = port << 1; local [all...] |
/arch/arm64/kernel/ |
H A D | sys.c | 31 unsigned long fd, off_t off) 33 if (offset_in_page(off) != 0) 36 return sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT); 29 sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, off_t off) argument
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/arch/sparc/kernel/ |
H A D | jump_label.c | 20 s32 off = (s32)entry->target - (s32)entry->code; local 23 /* ba,pt %xcc, . + (off << 2) */ 24 val = 0x10680000 | ((u32) off >> 2); 26 /* ba . + (off << 2) */ 27 val = 0x10800000 | ((u32) off >> 2);
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