Searched refs:offset (Results 1 - 25 of 1060) sorted by relevance

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/arch/sh/boards/mach-microdev/
H A Dio.c57 void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) argument
61 if ((offset >= IO_LAN91C111_BASE) &&
62 (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
66 result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE;
67 } else if ((offset >= IO_SUPERIO_BASE) &&
68 (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) {
74 result = IO_SUPERIO_PHYS + (offset << 1);
75 } else if (((offset >= IO_IDE1_BASE) &&
76 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
77 (offset
[all...]
/arch/mips/include/asm/mach-bcm63xx/
H A Dioremap.h11 static inline int is_bcm63xx_internal_registers(phys_t offset) argument
15 if (offset >= 0xfff80000)
22 if (offset >= 0xfff00000)
28 if (offset >= 0xb0000000 && offset < 0xb1000000)
35 static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, argument
38 if (is_bcm63xx_internal_registers(offset))
39 return (void __iomem *)offset;
/arch/arm/kernel/
H A Dinsn.c10 long offset; local
12 offset = (long)addr - (long)(pc + 4);
13 if (offset < -16777216 || offset > 16777214) {
18 s = (offset >> 24) & 0x1;
19 i1 = (offset >> 23) & 0x1;
20 i2 = (offset >> 22) & 0x1;
21 imm10 = (offset >> 12) & 0x3ff;
22 imm11 = (offset >> 1) & 0x7ff;
39 long offset; local
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H A Dmodule.c63 s32 offset; local
69 offset = ELF32_R_SYM(rel->r_info);
70 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
71 pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
76 sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
80 pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
101 offset = __mem_to_opcode_arm(*(u32 *)loc);
102 offset = (offset
[all...]
/arch/mips/jz4740/
H A Dserial.h21 void jz4740_serial_out(struct uart_port *p, int offset, int value);
H A Dserial.c20 void jz4740_serial_out(struct uart_port *p, int offset, int value) argument
22 switch (offset) {
32 writeb(value, p->membase + (offset << p->regshift));
/arch/x86/tools/
H A Dcalc_run_size.pl17 my $offset = hex($2);
20 $file_offset = $offset;
21 } elsif ($file_offset != $offset) {
22 # BFD linker shows the same file offset in ELF.
24 next if ($file_offset + $mem_size == $offset + $size);
28 printf STDERR "offset: 0x%lx\n", $offset;
37 die "Never found .bss or .brk file offset\n";
/arch/xtensa/include/asm/
H A Dio.h41 static inline void __iomem *ioremap_nocache(unsigned long offset, argument
44 if (offset >= XCHAL_KIO_PADDR
45 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
46 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);
51 static inline void __iomem *ioremap_cache(unsigned long offset, argument
54 if (offset >= XCHAL_KIO_PADDR
55 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
56 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR);
63 static inline void __iomem *ioremap(unsigned long offset, unsigned long size) argument
65 return ioremap_nocache(offset, siz
[all...]
/arch/sh/include/asm/
H A Dio_trapped.h24 unsigned long offset,
31 __ioremap_trapped(unsigned long offset, unsigned long size) argument
33 return match_trapped_io_handler(&trapped_mem, offset, size);
36 #define __ioremap_trapped(offset, size) NULL
43 __ioport_map_trapped(unsigned long offset, unsigned long size) argument
45 return match_trapped_io_handler(&trapped_io, offset, size);
48 #define __ioport_map_trapped(offset, size) NULL
54 #define __ioremap_trapped(offset, size) NULL
55 #define __ioport_map_trapped(offset, size) NULL
/arch/mips/boot/compressed/
H A Duart-16550.c12 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
17 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
22 #define PORT(offset) (CKSEG1ADDR(JZ4740_UART0_BASE_ADDR) + (4 * offset))
27 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
33 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
45 serial_in(int offset) argument
50 serial_out(int offset, int value) argument
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/arch/mips/include/asm/octeon/
H A Dcvmx-asm.h93 #define CVMX_PREPARE_FOR_STORE(address, offset) \
94 asm volatile ("pref 30, " CVMX_TMP_STR(offset) "(%[rbase])" : : \
101 #define CVMX_DONT_WRITE_BACK(address, offset) \
102 asm volatile ("pref 29, " CVMX_TMP_STR(offset) "(%[rbase])" : : \
117 #define CVMX_CACHE(op, address, offset) \
118 asm volatile ("cache " CVMX_TMP_STR(op) ", " CVMX_TMP_STR(offset) "(%[rbase])" \
121 #define CVMX_CACHE_LCKL2(address, offset) CVMX_CACHE(31, address, offset)
123 #define CVMX_CACHE_WBIL2(address, offset) CVMX_CACHE(23, address, offset)
[all...]
H A Dcvmx-pexp-defs.h31 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31) * 16)
43 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000008450ull) + ((offset) & 7) * 16)
44 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F00000083B0ull) + ((offset) & 7) * 16)
45 #define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000008400ull) + ((offset) & 7) * 16)
46 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x00011F00000084A0ull) + ((offset)
[all...]
/arch/mips/loongson/common/
H A Dearly_printk.c16 #define PORT(base, offset) (u8 *)(base + offset)
18 static inline unsigned int serial_in(unsigned char *base, int offset) argument
20 return readb(PORT(base, offset));
23 static inline void serial_out(unsigned char *base, int offset, int value) argument
25 writeb(value, PORT(base, offset));
/arch/sparc/lib/
H A Dbitext.c23 * Returns offset in the map or -1 if out of space.
29 int offset, count; /* siamese twins */ local
54 offset = t->first_free;
56 offset = t->last_off & ~align1;
59 off_new = find_next_zero_bit(t->map, t->size, offset);
61 count += off_new - offset;
62 offset = off_new;
63 if (offset >= t->size)
64 offset = 0;
69 t->size, t->used, offset, le
102 bit_map_clear(struct bit_map *t, int offset, int len) argument
[all...]
/arch/mips/include/asm/mach-tx39xx/
H A Dioremap.h23 static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, argument
27 if (offset >= TXX9_DIRECTMAP_BASE &&
28 offset < TXX9_DIRECTMAP_BASE + 0xff0000)
29 return (void __iomem *)offset;
/arch/mips/include/asm/mach-tx49xx/
H A Dioremap.h23 static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, argument
31 if (offset >= TXX9_DIRECTMAP_BASE &&
32 offset < TXX9_DIRECTMAP_BASE + 0x400000)
33 return (void __iomem *)(unsigned long)(int)offset;
/arch/sh/kernel/
H A Dptrace.c4 * regs_query_register_offset() - query register offset from its name
7 * regs_query_register_offset() returns the offset of a register in struct
15 return roff->offset;
20 * regs_query_register_name() - query register name from its offset
21 * @offset: the offset of a register in struct pt_regs.
24 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
26 const char *regs_query_register_name(unsigned int offset) argument
30 if (roff->offset
[all...]
/arch/powerpc/platforms/cell/spufs/
H A Dspu_save.c41 unsigned int offset; local
46 offset = LSCSA_QW_OFFSET(event_mask);
47 regs_spill[offset].slot[0] = spu_readch(SPU_RdEventMask);
52 unsigned int offset; local
57 offset = LSCSA_QW_OFFSET(tag_mask);
58 regs_spill[offset].slot[0] = spu_readch(MFC_RdTagMask);
84 unsigned int offset; local
90 offset = LSCSA_QW_OFFSET(fpcr);
91 regs_spill[offset].v = spu_mffpscr();
96 unsigned int offset; local
108 unsigned int offset; local
[all...]
H A Dspu_restore.c83 unsigned int offset; local
92 offset = LSCSA_QW_OFFSET(decr_status);
93 decr_running = regs_spill[offset].slot[0] & SPU_DECR_STATUS_RUNNING;
95 offset = LSCSA_QW_OFFSET(decr);
96 decr = regs_spill[offset].slot[0];
103 unsigned int offset; local
110 offset = LSCSA_QW_OFFSET(ppu_mb);
111 data = regs_spill[offset].slot[0];
117 unsigned int offset; local
124 offset
131 unsigned int offset; local
145 unsigned int offset; local
158 unsigned int offset; local
171 unsigned int offset; local
186 unsigned int offset; local
[all...]
/arch/ia64/include/asm/uv/
H A Duv_hub.h23 * M - The low M bits of a physical address represent the offset
50 * M - number of node offset bits (35 .. 40)
59 * M - number of node offset bits (35 .. 40)
171 /* pnode, offset --> socket virtual */
172 static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset) argument
174 return __va(((unsigned long)pnode << uv_hub_info->m_val) | offset);
183 unsigned long offset)
186 UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);
189 static inline void uv_write_global_mmr32(int pnode, unsigned long offset, argument
192 *uv_global_mmr32_address(pnode, offset)
182 uv_global_mmr32_address(int pnode, unsigned long offset) argument
195 uv_read_global_mmr32(int pnode, unsigned long offset) argument
205 uv_global_mmr64_address(int pnode, unsigned long offset) argument
212 uv_write_global_mmr64(int pnode, unsigned long offset, unsigned long val) argument
218 uv_read_global_mmr64(int pnode, unsigned long offset) argument
228 uv_local_mmr_address(unsigned long offset) argument
233 uv_read_local_mmr(unsigned long offset) argument
238 uv_write_local_mmr(unsigned long offset, unsigned long val) argument
[all...]
/arch/mips/alchemy/common/
H A Dgpiolib.c41 static int gpio2_get(struct gpio_chip *chip, unsigned offset) argument
43 return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);
46 static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value) argument
48 alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);
51 static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset) argument
53 return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE);
56 static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset, argument
59 return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE,
63 static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset) argument
65 return alchemy_gpio2_to_irq(offset
69 gpio1_get(struct gpio_chip *chip, unsigned offset) argument
74 gpio1_set(struct gpio_chip *chip, unsigned offset, int value) argument
80 gpio1_direction_input(struct gpio_chip *chip, unsigned offset) argument
85 gpio1_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument
92 gpio1_to_irq(struct gpio_chip *chip, unsigned offset) argument
[all...]
/arch/openrisc/include/asm/
H A Dio.h35 extern void __iomem *__ioremap(phys_addr_t offset, unsigned long size,
38 static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) argument
40 return __ioremap(offset, size, PAGE_KERNEL);
44 static inline void __iomem *ioremap_nocache(phys_addr_t offset, argument
47 return __ioremap(offset, size,
/arch/mips/mti-sead3/
H A Dsead3-console.c15 #define PORT(base_addr, offset) ((unsigned int __iomem *)(base_addr+(offset)*4))
19 static inline unsigned int serial_in(int offset, unsigned int base_addr) argument
21 return __raw_readl(PORT(base_addr, offset)) & 0xff;
24 static inline void serial_out(int offset, int value, unsigned int base_addr) argument
26 __raw_writel(value, PORT(base_addr, offset));
/arch/x86/include/asm/
H A Dpci-direct.h9 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
10 extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
11 extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset);
12 extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
13 extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
14 extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
/arch/x86/syscalls/
H A Dsyscallhdr.sh7 offset="$5"
18 if [ -z "$offset" ]; then
21 echo "#define __NR_${prefix}${name} ($offset + $nr)"

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