Searched refs:purge (Results 1 - 5 of 5) sorted by relevance

/arch/mn10300/mm/
H A Dcache-flush-by-reg.S60 # wait for busy bit of area purge
70 # area purge
77 # wait for busy bit of area purge
138 # wait for busy bit of area purge
153 # area purge
158 # wait for busy bit of area purge
164 # check purge of end address
196 # wait for busy bit of area purge & invalidate
206 # area purge & invalidate
210 # wait for busy bit of area purge
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H A Dcache-dbg-flush-by-reg.S1 /* MN10300 CPU cache invalidation routines, using automatic purge registers
49 # wait for busy bit of area purge
59 # area purge
66 # wait for busy bit of area purge
112 # determine the dcache purge control reg address
120 # conditionally purge this line in all ways
H A Dcache-dbg-flush-by-tag.S47 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
55 mov d0,(a1) # conditional purge
98 # determine the dcache purge control reg address
106 # conditionally purge this line in all ways
H A DKconfig.cache39 and invalidation by automatic purge register is not selected.
66 bool "Flush areas by way of automatic purge registers (AM34 only)"
122 icache using automatic purge registers to make breakpoints work.
140 purge registers to make breakpoints work.
/arch/ia64/mm/
H A Dtlb.c16 * Add multiple ptc.g/ptc.ga instruction support in global tlb purge.
38 u64 mask; /* mask of supported purge page-sizes */
39 unsigned long max_bits; /* log2 of largest supported purge page-size */
40 } purge; variable in typeref:struct:__anon1833
316 while (unlikely (((1UL << nbits) & purge.mask) == 0) &&
317 (nbits < purge.max_bits))
319 if (nbits > purge.max_bits)
320 nbits = purge.max_bits;
349 if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) {
351 "defaulting to architected purge pag
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