Searched refs:rn (Results 1 - 25 of 28) sorted by relevance

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/arch/arm/net/
H A Dbpf_jit_32.h132 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm))
134 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm))
136 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm)
137 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm)
139 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, r
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H A Dbpf_jit_32.c444 static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx) argument
448 emit(ARM_UDIV(rd, rm, rn), ctx);
454 if (rn != ARM_R1)
455 emit(ARM_MOV_R(ARM_R1, rn), ctx);
/arch/powerpc/boot/
H A Dreg.h22 #define mfspr(rn) ({unsigned long rval; \
23 asm volatile("mfspr %0," __stringify(rn) \
25 #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
H A Ddcr.h4 #define mfdcr(rn) \
7 asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \
10 #define mtdcr(rn, val) \
11 asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
12 #define mfdcrx(rn) \
15 asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
18 #define mtdcrx(rn, val) \
20 asm volatile("mtdcrx %0,%1" : : "r"(rn), "r" (val)); \
/arch/arm64/mm/
H A Dproc-macros.S25 .macro vma_vm_mm, rd, rn
26 ldr \rd, [\rn, #VMA_VM_MM]
32 .macro mmid, rd, rn
33 ldr \rd, [\rn, #MM_CONTEXT_ID]
/arch/powerpc/include/asm/
H A Ddcr-native.h64 #define mfdcr(rn) \
66 if (__builtin_constant_p(rn) && rn < 1024) \
67 asm volatile("mfdcr %0," __stringify(rn) \
70 rval = mfdcrx(rn); \
72 rval = __mfdcr(rn); \
75 #define mtdcr(rn, v) \
77 if (__builtin_constant_p(rn) && rn < 1024) \
78 asm volatile("mtdcr " __stringify(rn) ",
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H A Dreg_fsl_emb.h11 #define mfpmr(rn) ({unsigned int rval; \
12 asm volatile("mfpmr %0," __stringify(rn) \
14 #define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
H A Dreg_booke.h756 #define mftmr(rn) ({unsigned long rval; \
757 asm volatile(MFTMR(rn, %0) : "=r" (rval)); rval;})
758 #define mttmr(rn, v) asm volatile(MTTMR(rn, %0) : \
H A Dreg.h1197 #define mfspr(rn) ({unsigned long rval; \
1198 asm volatile("mfspr %0," __stringify(rn) \
1200 #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \
/arch/arm/kernel/
H A Dkprobes-arm.c81 int rn = (insn >> 16) & 0xf; local
86 register unsigned long rnv asm("r2") = (rn == 15) ? pc
87 : regs->uregs[rn];
101 regs->uregs[rn] = rnv;
110 int rn = (insn >> 16) & 0xf; local
114 register unsigned long rnv asm("r2") = (rn == 15) ? pc
115 : regs->uregs[rn];
131 regs->uregs[rn] = rnv;
141 int rn = (insn >> 16) & 0xf; local
146 register unsigned long rnv asm("r2") = (rn
167 int rn = (insn >> 16) & 0xf; local
201 int rn = (insn >> 16) & 0xf; local
229 int rn = (insn >> 12) & 0xf; local
280 int rn = insn & 0xf; local
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H A Dkprobes-common.c25 int rn = (insn >> 16) & 0xf; local
30 long *addr = (long *)regs->uregs[rn];
59 regs->uregs[rn] = (long)addr;
134 int rn = (insn >> 16) & 0xf; local
136 if (rn <= 12 && (reglist & 0xe000) == 0) {
140 } else if (rn >= 2 && (reglist & 0x8003) == 0) {
142 rn -= 2;
146 } else if (rn >= 3 && (reglist & 0x0007) == 0) {
149 rn -= 3;
158 (rn << 1
[all...]
H A Dkprobes-thumb.c30 int rn = (insn >> 16) & 0xf; local
33 unsigned long rnv = (rn == 15) ? pc : regs->uregs[rn];
166 int rn = (insn >> 16) & 0xf; local
170 register unsigned long rnv asm("r2") = (rn == 15) ? pc
171 : regs->uregs[rn];
180 if (rn != 15)
181 regs->uregs[rn] = rnv; /* Writeback base register */
191 int rn = (insn >> 16) & 0xf; local
195 register unsigned long rnv asm("r2") = regs->uregs[rn];
217 int rn = (insn >> 16) & 0xf; local
264 int rn = (insn >> 16) & 0xf; local
286 int rn = (insn >> 16) & 0xf; local
370 int rn = insn & 0x7; local
[all...]
H A Duprobes-arm.c169 int rn = (insn >> 16) & 0xf; local
171 unsigned used = reglist | (1 << rn);
173 if (rn == 15)
/arch/unicore32/mm/
H A Dproc-macros.S41 .macro vma_vm_mm, rd, rn
42 ldw \rd, [\rn+], #VMA_VM_MM
48 .macro vma_vm_flags, rd, rn
49 ldw \rd, [\rn+], #VMA_VM_FLAGS
52 .macro tsk_mm, rd, rn
53 ldw \rd, [\rn+], #TI_TASK
70 .macro mmid, rd, rn
71 ldw \rd, [\rn+], #MM_CONTEXT_ID
77 .macro asid, rd, rn
78 and \rd, \rn, #25
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H A Dalignment.c279 * B = rn pointer before instruction, A = rn pointer after instruction
291 unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits; local
302 rn = RN_BITS(instr);
303 newaddr = eaddr = regs->uregs[rn];
343 regs->uregs[rn] = newaddr;
/arch/arm/mach-tegra/
H A Dsleep.h49 /* waits until the microsecond counter (base) is > rn */
50 .macro wait_until, rn, base, tmp variable
51 add \rn, \rn, #1 variable
53 cmp \tmp, \rn
/arch/arm/mm/
H A Dabort-lv4t.S35 /* 0 */ b .data_arm_lateldrhpost @ ldrh rd, [rn], #m/rm
36 /* 1 */ b .data_arm_lateldrhpre @ ldrh rd, [rn, #m/rm]
39 /* 4 */ b .data_arm_lateldrpostconst @ ldr rd, [rn], #m
40 /* 5 */ b .data_arm_lateldrpreconst @ ldr rd, [rn, #m]
41 /* 6 */ b .data_arm_lateldrpostreg @ ldr rd, [rn], rm
42 /* 7 */ b .data_arm_lateldrprereg @ ldr rd, [rn, rm]
43 /* 8 */ b .data_arm_ldmstm @ ldm*a rn, <rlist>
44 /* 9 */ b .data_arm_ldmstm @ ldm*b rn, <rlist>
47 /* c */ b do_DataAbort @ ldc rd, [rn], #m @ Same as ldr rd, [rn], #
[all...]
H A Dproc-macros.S13 .macro vma_vm_mm, rd, rn
14 ldr \rd, [\rn, #VMA_VM_MM]
20 .macro vma_vm_flags, rd, rn
21 ldr \rd, [\rn, #VMA_VM_FLAGS]
24 .macro tsk_mm, rd, rn
25 ldr \rd, [\rn, #TI_TASK]
43 .macro mmid, rd, rn
45 ldr \rd, [\rn, #MM_CONTEXT_ID + 4 ]
47 ldr \rd, [\rn, #MM_CONTEXT_ID]
54 .macro asid, rd, rn
[all...]
H A Dalignment.c476 * B = rn pointer before instruction, A = rn pointer after instruction
487 unsigned int rd, rn, correction, nr_regs, regbits; local
501 rn = RN_BITS(instr);
502 newaddr = eaddr = regs->uregs[rn];
560 regs->uregs[rn] = newaddr;
/arch/arm64/kernel/
H A Dentry-ftrace.S58 .macro mcount_adjust_addr rd, rn
59 sub \rd, \rn, #AARCH64_INSN_SIZE
H A Darmv8_deprecated.c371 int rn, rt2, res = 0; local
390 rn = aarch32_insn_extract_reg_num(instr, A32_RN_OFFSET);
393 address = (u32)regs->user_regs.regs[rn];
398 rn, address, destreg,
/arch/sh/kernel/
H A Dtraps_32.c90 unsigned long *rm, *rn; local
95 rn = &regs->regs[index];
111 case 0: /* mov.[bwl] to/from memory via r0+rn */
116 dst = (unsigned char *)rn;
132 dstu = (unsigned char __user *)*rn;
143 dstu = (unsigned char __user *)*rn;
153 *rn -= count;
155 dstu = (unsigned char __user *)*rn;
167 dst = (unsigned char *)rn;
179 dst = (unsigned char*) rn;
[all...]
H A Ddisassemble.c302 int rn = 0; local
362 rn = nibs[n];
368 rn = (nibs[n] & 0xc) >> 2;
394 printk("r%d", rn);
397 printk("@r%d+", rn);
400 printk("@-r%d", rn);
403 printk("@r%d", rn);
406 printk("@(%d,r%d)", imm, rn);
433 printk("@(r0,r%d)", rn);
482 printk("fr%d", rn);
[all...]
/arch/powerpc/lib/
H A Dsstep.c38 extern int do_lfs(int rn, unsigned long ea);
39 extern int do_lfd(int rn, unsigned long ea);
40 extern int do_stfs(int rn, unsigned long ea);
41 extern int do_stfd(int rn, unsigned long ea);
42 extern int do_lvx(int rn, unsigned long ea);
43 extern int do_stvx(int rn, unsigned long ea);
44 extern int do_lxvd2x(int rn, unsigned long ea);
45 extern int do_stxvd2x(int rn, unsigned long ea);
342 static int __kprobes do_fp_load(int rn, int (*func)(int, unsigned long), argument
366 return (*func)(rn, e
383 do_fp_store(int rn, int (*func)(int, unsigned long), unsigned long ea, int nb, struct pt_regs *regs) argument
431 do_vec_load(int rn, int (*func)(int, unsigned long), unsigned long ea, struct pt_regs *regs) argument
439 do_vec_store(int rn, int (*func)(int, unsigned long), unsigned long ea, struct pt_regs *regs) argument
449 do_vsx_load(int rn, int (*func)(int, unsigned long), unsigned long ea, struct pt_regs *regs) argument
467 do_vsx_store(int rn, int (*func)(int, unsigned long), unsigned long ea, struct pt_regs *regs) argument
[all...]
/arch/m68k/fpsp040/
H A Dsint.S153 btstb #1,L_SCR1+3(%a6) |check for rn and rz
179 | Rmode is rn or rz; return signed zero

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