/arch/ia64/scripts/ |
H A D | check-segrel.S | 2 data4 @segrel(start) 4 start: label
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/arch/mn10300/include/asm/ |
H A D | cacheflush.h | 24 extern void mn10300_local_icache_inv_page(unsigned long start); 25 extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end); 26 extern void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size); 28 extern void mn10300_local_dcache_inv_page(unsigned long start); 29 extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end); 30 extern void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size); 32 extern void mn10300_icache_inv_page(unsigned long start); 33 extern void mn10300_icache_inv_range(unsigned long start, unsigned long end); 34 extern void mn10300_icache_inv_range2(unsigned long start, unsigned long size); 36 extern void mn10300_dcache_inv_page(unsigned long start); [all...] |
/arch/mn10300/mm/ |
H A D | cache-disabled.c | 16 asmlinkage long sys_cacheflush(unsigned long start, unsigned long end) argument 18 if (end < start)
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H A D | cache-smp-flush.c | 32 * @start: The address of the page of memory to be flushed. 37 void mn10300_dcache_flush_page(unsigned long start) argument 41 start &= ~(PAGE_SIZE-1); 44 mn10300_local_dcache_flush_page(start); 45 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, start + PAGE_SIZE); 51 * @start: The start address of the region to be flushed. 54 * Flush a range of addresses in the data cache on all CPUs, between start and 57 void mn10300_dcache_flush_range(unsigned long start, unsigne argument 75 mn10300_dcache_flush_range2(unsigned long start, unsigned long size) argument 108 mn10300_dcache_flush_inv_page(unsigned long start) argument 129 mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end) argument 148 mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size) argument [all...] |
H A D | cache-smp-inv.c | 32 * @start: The address of the page of memory to be invalidated. 37 void mn10300_icache_inv_page(unsigned long start) argument 41 start &= ~(PAGE_SIZE-1); 44 mn10300_local_icache_inv_page(start); 45 smp_cache_call(SMP_ICACHE_INV_RANGE, start, start + PAGE_SIZE); 51 * @start: The start address of the region to be invalidated. 55 * between start and end-1 inclusive. 57 void mn10300_icache_inv_range(unsigned long start, unsigne argument 75 mn10300_icache_inv_range2(unsigned long start, unsigned long size) argument 107 mn10300_dcache_inv_page(unsigned long start) argument 127 mn10300_dcache_inv_range(unsigned long start, unsigned long end) argument 145 mn10300_dcache_inv_range2(unsigned long start, unsigned long size) argument [all...] |
H A D | cache-inv-icache.c | 21 * @start: The starting virtual address of the page part. 28 static void flush_icache_page_range(unsigned long start, unsigned long end) argument 38 off = start & ~PAGE_MASK; 39 size = end - start; 43 pgd = pgd_offset(current->mm, start); 47 pud = pud_offset(pgd, start); 51 pmd = pmd_offset(pud, start); 55 ppte = pte_offset_map(pmd, start); 72 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end); 77 * @start 84 flush_icache_range(unsigned long start, unsigned long end) argument [all...] |
H A D | cache-flush-icache.c | 27 unsigned long start = page_to_phys(page); local 32 mn10300_local_dcache_flush_page(start); 33 mn10300_local_icache_inv_page(start); 35 smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, start + PAGE_SIZE); 43 * @start: The starting virtual address of the page part. 50 static void flush_icache_page_range(unsigned long start, unsigned long end) argument 60 off = start & ~PAGE_MASK; 61 size = end - start; 65 pgd = pgd_offset(current->mm, start); 108 flush_icache_range(unsigned long start, unsigned long end) argument [all...] |
/arch/hexagon/mm/ |
H A D | cache.c | 25 #define spanlines(start, end) \ 26 (((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1) 28 void flush_dcache_range(unsigned long start, unsigned long end) argument 30 unsigned long lines = spanlines(start, end-1); 33 start &= ~(LINESIZE - 1); 41 : "r" (start) 43 start += LINESIZE; 48 void flush_icache_range(unsigned long start, unsigned long end) argument 50 unsigned long lines = spanlines(start, end-1); 53 start 73 hexagon_clean_dcache_range(unsigned long start, unsigned long end) argument 93 hexagon_inv_dcache_range(unsigned long start, unsigned long end) argument [all...] |
/arch/blackfin/include/asm/ |
H A D | cacheflush.h | 28 #define flush_cache_range(vma, start, end) do { } while (0) 30 #define flush_cache_vmap(start, end) do { } while (0) 31 #define flush_cache_vunmap(start, end) do { } while (0) 34 #define flush_icache_range_others(start, end) \ 35 smp_icache_flush_range_others((start), (end)) 37 #define flush_icache_range_others(start, end) do { } while (0) 40 static inline void flush_icache_range(unsigned start, unsigned end) argument 44 blackfin_dcache_flush_range(start, end); 47 if (start >= L2_START && end <= L2_START + L2_LENGTH) 48 blackfin_dcache_flush_range(start, en [all...] |
/arch/parisc/math-emu/ |
H A D | fpbits.h | 53 #define Bitfield_extract(start, length, object) \ 54 ((object) >> (HOSTWDSZ - (start) - (length)) & \ 57 #define Bitfield_signed_extract(start, length, object) \ 58 ((int)((object) << start) >> (HOSTWDSZ - (length))) 60 #define Bitfield_mask(start, len, object) \ 61 ((object) & (((unsigned)-1 >> (HOSTWDSZ-len)) << (HOSTWDSZ-start-len))) 63 #define Bitfield_deposit(value,start,len,object) object = \ 64 ((object) & ~(((unsigned)-1 >> (HOSTWDSZ-len)) << (HOSTWDSZ-start-len))) | \ 65 (((value) & ((unsigned)-1 >> (HOSTWDSZ-len))) << (HOSTWDSZ-start-len))
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/arch/x86/kernel/ |
H A D | resource.c | 4 static void resource_clip(struct resource *res, resource_size_t start, argument 9 if (res->end < start || res->start > end) 12 if (res->start < start) 13 low = start - res->start; 20 res->end = start - 1; 22 res->start = end + 1;
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/arch/frv/include/asm/ |
H A D | cacheflush.h | 24 #define flush_cache_range(mm, start, end) do {} while(0) 26 #define flush_cache_vmap(start, end) do {} while(0) 27 #define flush_cache_vunmap(start, end) do {} while(0) 35 extern void frv_dcache_writeback(unsigned long start, unsigned long size); 36 extern void frv_cache_invalidate(unsigned long start, unsigned long size); 37 extern void frv_icache_invalidate(unsigned long start, unsigned long size); 38 extern void frv_cache_wback_inv(unsigned long start, unsigned long size); 71 static inline void flush_icache_range(unsigned long start, unsigned long end) argument 73 frv_cache_wback_inv(start, end); 78 unsigned long start, unsigne 80 flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long start, unsigned long len) argument [all...] |
/arch/mips/pci/ |
H A D | pci-malta.c | 42 .start = 0x00000000UL, 93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; local 115 start = GT_READ(GT_PCI0M0LD_OFS); 118 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK); 124 if (end1 - start1 > end - start) { 125 start = start1; 129 mask = ~(start ^ end); 131 BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && 133 gt64120_mem_resource.start = start; [all...] |
/arch/powerpc/include/asm/ |
H A D | sparsemem.h | 19 extern int create_section_mapping(unsigned long start, unsigned long end); 20 extern int remove_section_mapping(unsigned long start, unsigned long end);
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/arch/sh/include/asm/ |
H A D | tlbflush.h | 10 * - flush_tlb_range(vma, start, end) flushes a range of pages 11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 16 unsigned long start, 20 extern void local_flush_tlb_kernel_range(unsigned long start, 30 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 33 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 43 #define flush_tlb_range(vma, start, end) \ 44 local_flush_tlb_range(vma, start, end) 46 #define flush_tlb_kernel_range(start, end) \ 47 local_flush_tlb_kernel_range(start, en [all...] |
/arch/xtensa/include/asm/ |
H A D | sysmem.h | 17 unsigned long start; member in struct:meminfo 22 * Bank array is sorted by .start. 33 int add_sysmem_bank(unsigned long start, unsigned long end);
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/arch/arm/mm/ |
H A D | cache-xsc3l2.c | 98 static void xsc3_l2_inv_range(unsigned long start, unsigned long end) argument 102 if (start == 0 && end == -1ul) { 112 if (start & (CACHE_LINE_SIZE - 1)) { 113 vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr); 116 start = (start | (CACHE_LINE_SIZE - 1)) + 1; 120 * Invalidate all full cache lines between 'start' and 'end'. 122 while (start < (end & ~(CACHE_LINE_SIZE - 1))) { 123 vaddr = l2_map_va(start, vaddr); 125 start 142 xsc3_l2_clean_range(unsigned long start, unsigned long end) argument 180 xsc3_l2_flush_range(unsigned long start, unsigned long end) argument [all...] |
/arch/x86/include/asm/ |
H A D | pat.h | 15 extern int reserve_memtype(u64 start, u64 end, 17 extern int free_memtype(u64 start, u64 end); 22 int io_reserve_memtype(resource_size_t start, resource_size_t end, 25 void io_free_memtype(resource_size_t start, resource_size_t end);
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/arch/c6x/include/asm/ |
H A D | cache.h | 66 extern void enable_caching(unsigned long start, unsigned long end); 67 extern void disable_caching(unsigned long start, unsigned long end); 80 extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end); 81 extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end); 82 extern void L1D_cache_block_writeback_invalidate(unsigned int start, 84 extern void L1D_cache_block_writeback(unsigned int start, unsigned int end); 85 extern void L2_cache_block_invalidate(unsigned int start, unsigned int end); 86 extern void L2_cache_block_writeback(unsigned int start, unsigned int end); 87 extern void L2_cache_block_writeback_invalidate(unsigned int start, 89 extern void L2_cache_block_invalidate_nowait(unsigned int start, [all...] |
/arch/hexagon/include/asm/ |
H A D | tlbflush.h | 41 unsigned long start, unsigned long end); 42 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 56 #define flush_tlb_pgtables(mm, start, end)
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/arch/sparc/include/asm/ |
H A D | tlbflush_32.h | 10 #define flush_tlb_range(vma, start, end) \ 11 sparc32_cachetlb_ops->tlb_range(vma, start, end) 18 static inline void flush_tlb_kernel_range(unsigned long start, argument
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/arch/score/mm/ |
H A D | cache.c | 173 unsigned long start, unsigned long end) 185 pgdp = pgd_offset(mm, start); 186 pudp = pud_offset(pgdp, start); 187 pmdp = pmd_offset(pudp, start); 188 ptep = pte_offset(pmdp, start); 190 while (start <= end) { 192 pgdp = pgd_offset(mm, start); 193 pudp = pud_offset(pgdp, start); 194 pmdp = pmd_offset(pudp, start); 195 ptep = pte_offset(pmdp, start); 172 flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) argument 246 flush_dcache_range(unsigned long start, unsigned long end) argument 265 flush_icache_range(unsigned long start, unsigned long end) argument [all...] |
/arch/xtensa/mm/ |
H A D | init.c | 43 sysmem.bank[i].start, sysmem.bank[i].end, 44 (sysmem.bank[i].end - sysmem.bank[i].start) >> 10); 48 * Find bank with maximal .start such that bank.start <= start 50 static inline struct meminfo * __init find_bank(unsigned long start) argument 56 if (sysmem.bank[i].start <= start) 88 int __init add_sysmem_bank(unsigned long start, unsigned long end) argument 95 if (start 170 mem_reserve(unsigned long start, unsigned long end, int must_exist) argument 353 free_initrd_mem(unsigned long start, unsigned long end) argument [all...] |
/arch/mips/bcm63xx/ |
H A D | dev-hsspi.c | 19 .start = -1, /* filled at runtime */ 24 .start = -1, /* filled at runtime */ 41 spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); 42 spi_resources[0].end = spi_resources[0].start; 44 spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
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/arch/unicore32/include/asm/ |
H A D | memblock.h | 22 unsigned long start; member in struct:membank 37 #define bank_pfn_start(bank) __phys_to_pfn((bank)->start) 38 #define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) 40 #define bank_phys_start(bank) ((bank)->start) 41 #define bank_phys_end(bank) ((bank)->start + (bank)->size)
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