/arch/alpha/include/asm/ |
H A D | word-at-a-time.h | 41 unsigned long t1, t2, t3; 47 t3 = bits & 0xaa; 50 if (t3) t3 = 1; 51 return t1 + t2 + t3;
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/arch/alpha/include/uapi/asm/ |
H A D | swab.h | 26 __u64 t0, t1, t2, t3; local 33 t3 = t2 & 0x00FF00FF; /* t3 : 0000000000CC00AA */ 34 t1 = t0 + t3; /* t1 : ssssssssDDCCBBAA */
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H A D | regdef.h | 9 #define t3 $4 macro
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/arch/alpha/lib/ |
H A D | ev67-strrchr.S | 41 sll t5, 8, t3 # U : 00000000ch000000 45 or t5, t3, t3 # E : 00000000chch0000 50 or t2, t3, t2 # E : 0000chchchch0000 59 cmpbge zero, t2, t3 # E : bits set iff byte == c 61 andnot t3, t4, t3 # E : clear garbage from char test 67 cmovne t3, v0, t6 # E : save previous comparisons match 71 cmovne t3, t3, t [all...] |
H A D | ev67-strchr.S | 32 and a1, 0xff, t3 # E : 00000000000000ch 36 insbl t3, 6, a3 # U : 00ch000000000000 37 or t5, t3, a1 # E : 000000000000chch 54 cmpbge zero, t1, t3 # E : bits set iff byte == c 55 or t2, t3, t0 # E : bits set iff char match or zero match 73 cmpbge zero, t1, t3 # E : bits set iff byte == c 74 or t2, t3, t0 # E : 75 cttz t3, a2 # U0 : speculative (in case we get a match) 80 and t0, t3, t1 # E : bit set iff byte was the char
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H A D | strchr.S | 35 cmpbge zero, t1, t3 # e0 : bits set iff byte == c 36 or t2, t3, t0 # e1 : bits set iff char match or zero match 45 cmpbge zero, t1, t3 # .. e1 : bits set iff byte == c 46 or t2, t3, t0 # e0 : 52 and t0, t3, t1 # e0 : bit set iff byte was the char 56 and t0, 0xcc, t3 # .. e1 : 59 cmovne t3, 2, t3 # e0 : 61 addq t2, t3, t2 # e0 :
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H A D | strrchr.S | 37 cmpbge zero, t2, t3 # e0 : bits set iff byte == c 39 andnot t3, t4, t3 # e0 : clear garbage from char test 45 cmovne t3, v0, t6 # .. e1 : save previous comparisons match 46 cmovne t3, t3, t8 # e0 : 50 cmpbge zero, t2, t3 # e0 : bits set iff byte == c 60 and t3, t4, t3 # e0 : mask out char matches after null 61 cmovne t3, t [all...] |
/arch/mips/kernel/ |
H A D | octeon_switch.S | 34 PTR_L t3, TASK_THREAD_INFO(a0) 35 LONG_L t0, TI_FLAGS(t3) 42 LONG_S t0, TI_FLAGS(t3) 47 LONG_L t0, ST_OFF(t3) 50 LONG_S t0, ST_OFF(t3) 177 dmfc2 t3, 0x0082 184 sd t3, OCTEON_CP2_3DES_KEY+16(a0) 185 dmfc2 t3, 0x0103 192 sd t3, OCTEON_CP2_AES_IV+8(a0) 193 dmfc2 t3, [all...] |
H A D | mcount.S | 86 sltu t3, t1, a0 /* t3 = (a0 > _etext) */ 87 or t1, t2, t3 123 PTR_L t3, ftrace_graph_return 124 bne t1, t3, ftrace_graph_caller 127 PTR_L t3, ftrace_graph_entry 128 bne t1, t3, ftrace_graph_caller
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H A D | r2300_switch.S | 55 PTR_L t3, TASK_THREAD_INFO(a0) 60 lw t0, ST_OFF(t3) 63 sw t0, ST_OFF(t3)
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/arch/mips/netlogic/common/ |
H A D | smpboot.S | 112 li t3, CKSEG1ADDR(RESET_DATA_PHYS) 113 ADDIU t1, t3, BOOT_CPU_READY 115 li t3, 1 116 sw t3, 0(t1) 127 nor t3, t2, zero 135 and t2, t1, t3 /* mask out old thread mode */
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H A D | reset.S | 105 li t3, 0x1000 /* loop count */ 125 bne t3, t2, 11b 190 mul t3, t2, t1 /* t3 = node * 0x40000 */ 197 add t2, t2, t3 /* t2 <- SYS offset for node */ 251 li t3, CKSEG1ADDR(RESET_DATA_PHYS) 252 ADDIU t1, t3, BOOT_CPU_READY
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/arch/x86/crypto/ |
H A D | glue_helper-asm-avx2.S | 61 t1x, t2, t2x, t3, t3x, t4, t5) \ 71 vinserti128 $1, t2x, t3, t2; /* ab: le0 ; cd: le1 */ \ 75 add2_le128(t2, t0, t4, t3, t5); /* ab: le2 ; cd: le3 */ \ 77 add2_le128(t2, t0, t4, t3, t5); \ 79 add2_le128(t2, t0, t4, t3, t5); \ 81 add2_le128(t2, t0, t4, t3, t5); \ 83 add2_le128(t2, t0, t4, t3, t5); \ 85 add2_le128(t2, t0, t4, t3, t5); \ 87 add2_le128(t2, t0, t4, t3, t5); \ 124 tivx, t0, t0x, t1, t1x, t2, t2x, t3, \ [all...] |
H A D | camellia-aesni-avx-asm_64.S | 49 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ 71 vmovdqa .Lpre_tf_hi_s4, t3; \ 81 filter_8bit(x3, t2, t3, t7, t6); \ 82 filter_8bit(x6, t2, t3, t7, t6); \ 98 vmovdqa .Lpost_tf_hi_s3, t3; \ 107 filter_8bit(x2, t2, t3, t7, t6); \ 108 filter_8bit(x5, t2, t3, t7, t6); \ 120 vpsrldq $3, t0, t3; \ 125 vpshufb t6, t3, t3; \ [all...] |
H A D | camellia-aesni-avx2-asm_64.S | 66 #define roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ 76 vbroadcasti128 .Lpre_tf_hi_s4, t3; \ 94 filter_8bit(x3, t2, t3, t7, t4); \ 95 filter_8bit(x6, t2, t3, t7, t4); \ 96 vextracti128 $1, x3, t3##_x; \ 115 vaesenclast t4##_x, t3##_x, t3##_x; \ 116 vinserti128 $1, t3##_x, x3, x3; \ 120 vextracti128 $1, x1, t3##_x; \ 131 vaesenclast t4##_x, t3##_ [all...] |
/arch/mips/include/asm/ |
H A D | regdef.h | 33 #define t3 $11 macro 84 #define t3 $15 macro
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/arch/arm/mach-omap2/ |
H A D | gpmc-smc91x.c | 66 const int t3 = 10; /* Figure 12.2 read and 12.4 write */ local 87 dev_t.t_oeasu = t3 * 1000; 91 dev_t.t_rd_cycle = (t20 - t3) * 1000; 93 dev_t.t_weasu = t3 * 1000; 97 dev_t.t_wr_cycle = (t20 - t3) * 1000;
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/arch/mips/lib/ |
H A D | csum_partial.S | 27 #undef t3 31 #define t3 $11 define 180 CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4) 191 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4) 192 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4) 193 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4) 194 CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4) 206 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4) 207 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4) 215 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t [all...] |
/arch/mips/cavium-octeon/ |
H A D | octeon-memcpy.S | 107 #undef t3 111 #define t3 $11 define 195 EXC( LOAD t3, UNIT(3)(src), l_exc_copy) 200 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u) 204 EXC( LOAD t3, UNIT(7)(src), l_exc_copy) 209 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u) 214 EXC( LOAD t3, UNIT(-5)(src), l_exc_copy) 218 EXC( STORE t3, UNIT(-5)(dst), s_exc_p5u) 222 EXC( LOAD t3, UNIT(-1)(src), l_exc_copy) 226 EXC( STORE t3, UNI [all...] |
H A D | csrc-octeon.c | 102 u64 t1, t2, t3; local 112 "mflo\t%[t3]\n\t" 114 "dsrlv\t%[rv],%[t3],%[shift]\n\t" 117 : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3)
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/arch/ia64/lib/ |
H A D | copy_page.S | 42 .rotr t1[PIPE_DEPTH], t2[PIPE_DEPTH], t3[PIPE_DEPTH], t4[PIPE_DEPTH], \ 75 (p[0]) ld8 t3[0]=[src1],16 76 (EPI) st8 [tgt1]=t3[PIPE_DEPTH-1],16
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/arch/arm/crypto/ |
H A D | sha256-armv4.pl | 46 $T1="r3"; $t3="r3"; 123 and $t3,$t3,$t2 @ (b^c)&=(a^b) 125 eor $t3,$t3,$b @ Maj(a,b,c) 127 @ add $h,$h,$t3 @ h+=Maj(a,b,c) 129 ($t2,$t3)=($t3,$t2); 232 eor $t3,$B,$C @ magic 242 ldreq $t3,[s [all...] |
/arch/mips/dec/ |
H A D | int-handler.S | 253 1: srlv t3,t1,t2 254 2: xor t1,t3 255 and t3,t0,t1 256 beqz t3,3f 258 move t0,t3 262 srlv t3,t1,t2
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/arch/mips/fw/lib/ |
H A D | call_o32.S | 81 lw t3,(t0) 83 sw t3,(t1)
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/arch/sparc/lib/ |
H A D | memcpy.S | 17 #define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ 25 st %t3, [%dst + (offset) + 0x0c]; \ 31 #define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ 41 #define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \ 47 st %t3, [%dst - (offset) - 0x04]; 49 #define MOVE_LASTALIGNCHUNK(src, dst, offset, t0, t1, t2, t3) \ 62 #define RMOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ 70 st %t3, [%dst - (offset) - 0x14]; \ 76 #define RMOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ 86 #define RMOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \ [all...] |