| /arch/arm/plat-orion/include/plat/ |
| H A D | time.h | 17 unsigned int irq, unsigned int tclk);
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| H A D | common.h | 112 void __init orion_clkdev_init(struct clk *tclk);
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| /arch/arm/plat-orion/ |
| H A D | time.c | 190 unsigned int irq, unsigned int tclk)
200 ticks_per_jiffy = (tclk + HZ/2) / HZ;
205 sched_clock_register(orion_read_sched_clock, 32, tclk);
218 tclk, 300, 32, clocksource_mmio_readl_down);
225 clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe);
189 orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask, unsigned int irq, unsigned int tclk) argument
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| H A D | common.c | 41 clkdev entries to the tclk. */
42 void __init orion_clkdev_init(struct clk *tclk) argument
44 orion_clkdev_add(NULL, "orion_spi.0", tclk);
45 orion_clkdev_add(NULL, "orion_spi.1", tclk);
46 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk);
47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk);
48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk);
49 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk);
50 orion_clkdev_add(NULL, "orion_wdt", tclk);
51 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk);
[all...] |
| /arch/arm/mach-dove/ |
| H A D | common.c | 74 static struct clk *tclk; variable in typeref:struct:clk
90 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
93 usb0 = dove_register_gate("usb0", "tclk", CLOCK_GATING_BIT_USB0);
94 usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1);
95 sata = dove_register_gate("sata", "tclk", CLOCK_GATING_BIT_SATA);
96 pex0 = dove_register_gate("pex0", "tclk", CLOCK_GATING_BIT_PCIE0);
97 pex1 = dove_register_gate("pex1", "tclk", CLOCK_GATING_BIT_PCIE1);
98 sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0);
99 sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO
[all...] |
| /arch/arm/mach-mv78xx0/ |
| H A D | common.c | 167 static struct clk *tclk; variable in typeref:struct:clk
171 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
174 orion_clkdev_init(tclk);
299 IRQ_MV78XX0_UART_0, tclk);
309 IRQ_MV78XX0_UART_1, tclk);
319 IRQ_MV78XX0_UART_2, tclk);
328 IRQ_MV78XX0_UART_3, tclk);
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| /arch/arm/mach-orion5x/ |
| H A D | common.c | 65 static struct clk *tclk; variable in typeref:struct:clk
69 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
72 orion_clkdev_init(tclk);
149 IRQ_ORION5X_UART0, tclk);
158 IRQ_ORION5X_UART1, tclk);
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| /arch/powerpc/boot/dts/ |
| H A D | p2020rdb-pc.dtsi | 218 fsl,tclk-period = <5>;
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| H A D | p2020rdb.dts | 230 fsl,tclk-period = <5>;
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| H A D | p2020ds.dtsi | 186 fsl,tclk-period = <5>;
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| H A D | mpc8313erdb.dts | 184 fsl,tclk-period = <10>;
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| H A D | mpc8572ds.dtsi | 196 fsl,tclk-period = <5>;
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| /arch/mips/include/asm/octeon/ |
| H A D | cvmx-uctlx-defs.h | 439 uint64_t tclk:1; member in struct:cvmx_uctlx_uphy_portx_ctl_status::cvmx_uctlx_uphy_portx_ctl_status_s
447 uint64_t tclk:1;
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| /arch/arm/mach-omap1/ |
| H A D | clock.c | 772 void propagate_rate(struct clk *tclk) argument
776 list_for_each_entry(clkp, &tclk->children, sibling) {
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