Searched refs:timer_base (Results 1 - 4 of 4) sorted by relevance

/arch/arm/plat-orion/include/plat/
H A Dtime.h14 void orion_time_set_base(void __iomem *timer_base);
/arch/arm/mach-imx/
H A Dtime.c85 static void __iomem *timer_base; variable
92 __raw_writel(0, timer_base + V2_IR);
94 tmp = __raw_readl(timer_base + MXC_TCTL);
95 __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL);
102 __raw_writel(1<<0, timer_base + V2_IR);
104 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
105 timer_base + MXC_TCTL);
113 __raw_writel(0, timer_base + MX1_2_TSTAT);
116 timer_base + MX1_2_TSTAT);
118 __raw_writel(V2_TSTAT_OF1, timer_base
[all...]
H A Depit.c62 static void __iomem *timer_base; variable
68 val = __raw_readl(timer_base + EPITCR);
70 __raw_writel(val, timer_base + EPITCR);
77 val = __raw_readl(timer_base + EPITCR);
79 __raw_writel(val, timer_base + EPITCR);
84 __raw_writel(EPITSR_OCIF, timer_base + EPITSR);
91 return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,
102 tcmp = __raw_readl(timer_base + EPITCNR);
104 __raw_writel(tcmp - evt, timer_base + EPITCMPR);
208 timer_base
[all...]
/arch/arm/plat-orion/
H A Dtime.c50 static void __iomem *timer_base; variable
66 return ~readl(timer_base + TIMER0_VAL_OFF);
95 writel(delta, timer_base + TIMER1_VAL_OFF);
100 u = readl(timer_base + TIMER_CTRL_OFF);
102 writel(u, timer_base + TIMER_CTRL_OFF);
120 writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
121 writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
132 u = readl(timer_base + TIMER_CTRL_OFF);
134 timer_base + TIMER_CTRL_OFF);
139 u = readl(timer_base
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