Searched refs:upper (Results 1 - 25 of 49) sorted by relevance

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/arch/mips/include/asm/
H A Dmaar.h36 * @upper: The highest address that the MAAR pair will affect. Must be
45 phys_addr_t upper, unsigned attrs)
49 BUG_ON(((upper & 0xffff) != 0xffff)
50 || ((upper & ~0xffffull) & ~(MIPS_MAAR_ADDR << 4)));
55 /* Write the upper address & attributes (only MIPS_MAAR_V matters) */
58 write_c0_maar(((upper >> 4) & MIPS_MAAR_ADDR) | attrs);
72 * @upper: The highest address that the MAAR pair will affect. Must be
79 * addresses from lower to upper inclusive.
83 phys_addr_t upper; member in struct:maar_config
104 write_maar_pair(i, cfg[i].lower, cfg[i].upper, cf
44 write_maar_pair(unsigned idx, phys_addr_t lower, phys_addr_t upper, unsigned attrs) argument
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/arch/x86/include/asm/
H A Ddiv64.h48 u32 upper; local
50 upper = d.v32[1];
52 if (upper >= divisor) {
53 d.v32[1] = upper / divisor;
54 upper %= divisor;
57 "rm" (divisor), "0" (d.v32[0]), "1" (upper));
/arch/arm/mach-ixp4xx/include/mach/
H A Dentry-macro.S19 beq 1001f @ upper IRQ?
28 * IXP465/IXP435 has an upper IRQ status register
32 ldr \irqstat, [\irqstat] @ get upper interrupts
/arch/microblaze/kernel/
H A Dftrace.c185 unsigned int upper = (unsigned int)func; local
190 upper = 0xb0000000 + (upper >> 16); /* imm func_upper */
193 pr_debug("%s: func=0x%x, ip=0x%x, upper=0x%x, lower=0x%x\n",
194 __func__, (unsigned int)func, (unsigned int)ip, upper, lower);
196 /* save upper and lower code */
197 ret = ftrace_modify_code(ip, upper);
/arch/arm/kernel/
H A Dmodule.c66 u32 upper, lower, sign, j1, j2; local
158 upper = __mem_to_opcode_thumb16(*(u16 *)loc);
166 * S = upper[10] = offset[24]
169 * imm10 = upper[9:0] = offset[21:12]
174 sign = (upper >> 10) & 1;
179 ((upper & 0x03ff) << 12) |
208 upper = (u16)((upper & 0xf800) | (sign << 10) |
214 *(u16 *)loc = __opcode_to_mem_thumb16(upper);
220 upper
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/arch/x86/kernel/
H A Dprobe_roms.c200 unsigned long start, length, upper; local
205 upper = adapter_rom_resources[0].start;
206 for (start = video_rom_resource.start; start < upper; start += 2048) {
228 if (start < upper)
229 start = upper;
233 upper = system_rom_resource.start;
241 upper = extension_rom_resource.start;
246 for (i = 0; i < ARRAY_SIZE(adapter_rom_resources) && start < upper; start += 2048) {
258 if (!length || start + length > upper || !romchecksum(rom, length))
/arch/arm/mm/
H A Dproc-v7-3level.S61 orr rpgdh, rpgdh, r2, lsl #(48 - 32) @ upper 32-bits of pgd
146 mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
150 mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
/arch/m68k/fpsp040/
H A Dbinstr.S23 | to force the first byte formed to have a 0 in the upper 4 bits.
40 | upper word of d0. If it is the ls digit, write the word
51 | d2: upper 32-bits of fraction for mul by 8
53 | d4: upper 32-bits of fraction for mul by 2
106 addxl %d4,%d2 |add with extend upper 32 bits
109 swap %d6 |with d6 = 0; put 0 in upper word
117 aslw #4,%d7 |first digit in upper 4 bits d7b
131 lslw #4,%d7 |move it to upper 4 bits
H A Dx_store.S137 swap %d0 |d0 now in upper word
155 bfextu %d1{#1:#20},%d1 |get upper 20 bits of ms
160 lsll %d0,%d1 |put lower 11 bits in upper bits
208 swap %d0 |put exp in upper word of d0
223 bfextu %d1{#1:#23},%d1 |get upper 23 bits of ms
H A Dsgetem.S112 bnes upper |then branch
124 upper: label
H A Dx_operr.S12 | the upper 32 bits of the mantissa are sent to the integer unit). If
218 movel ETEMP_HI(%a6),%d0 |output will be from upper 32 bits
282 | Check the exponent for $c000 and the upper 32 bits of the
H A Dx_unfl.S146 | ;upper word for round
190 | information respectively on upper/lower register halves.
248 tstl LOCAL_HI(%a0) |check upper mantissa
/arch/powerpc/include/asm/
H A Dtime.h139 static inline void set_tb(unsigned int upper, unsigned int lower) argument
142 mtspr(SPRN_TBWU, upper);
/arch/x86/crypto/
H A Dcrc32c-pcl-intel-asm_64.S117 # less_than_8 expects length in upper 3 bits of len_dw
251 # in upper 4 bits of len_dw
258 # less_than_8 expects length in upper 3 bits of len_dw
272 # upper lg(j) bits of len_dw
287 # upper 3 bits of len_dw
295 # upper 2 bits of len_dw
/arch/arm/lib/
H A Ddiv64.S57 @ See if we need to handle upper 32-bit result.
62 @ Align divisor with upper part of dividend.
87 @ The division loop for needed upper bit positions.
/arch/c6x/lib/
H A Dmpyll.S42 || mpy32u .m2x B5,A4,B1:B0 ; X0*Y1 (don't need upper 32-bits)
43 || mpy32u .m1x A5,B4,A3:A2 ; X1*Y0 (don't need upper 32-bits)
/arch/mips/dec/
H A Dint-handler.S167 # upper part of IOASIC Address
184 # upper part of IOASIC Address
/arch/mips/pci/
H A Dpci-octeon.c47 uint64_t upper:2; member in struct:octeon_pci_address::__anon2223
264 pci_addr.s.upper = 2;
301 pci_addr.s.upper = 2;
/arch/alpha/lib/
H A Dev6-csum_ipv6_magic.S17 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
146 zapnot $4,3,$0 # U : clear upper garbage bits
H A Dev6-memchr.S26 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
62 extql $1, $16, $7 # U : $7 is upper bits
/arch/ia64/include/asm/sn/
H A Dpic.h151 u64 upper; /* 0x0003{00,,,F0} */ member in struct:pic::__anon1582
H A Dtiocp.h99 u64 upper; /* 0x0003{00,,,F0} */ member in struct:tiocp::__anon1697
/arch/s390/lib/
H A Dqrnnd.S6 # r3 : upper half of 64 bit word n
/arch/powerpc/kernel/
H A Dmodule_64.c181 u16 upper, lower; local
188 upper = buf[0] & 0xffff;
192 offset = ((short)upper << 16) + (short)lower;
/arch/arm/kvm/
H A Dinterrupts.S204 mov r1, #0 @ Clear upper bits in return value
207 mov r0, #0 @ Clear upper bits in return value

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