Searched refs:val2 (Results 1 - 19 of 19) sorted by relevance

/arch/sh/boards/mach-dreamcast/
H A Drtc.c35 unsigned long val1, val2; local
41 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
43 } while (val1 != val2);
59 unsigned long val1, val2; local
69 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
71 } while (val1 != val2);
/arch/ia64/include/asm/sn/
H A Drw_mmr.h26 extern void pio_atomic_phys_write_mmrs(volatile long *mmr1, long val1, volatile long *mmr2, long val2);
/arch/arm/kernel/
H A Dkprobes-test.h234 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \
237 TEST_ARG_REG(reg2, val2) \
242 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\
245 TEST_ARG_REG(reg2, val2) \
251 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \
254 TEST_ARG_REG(reg2, val2) \
268 #define TEST_PR(code1, reg1, val1, code2, reg2, val2, code3) \
271 TEST_ARG_REG(reg2, val2) \
276 #define TEST_RP(code1, reg1, val1, code2, reg2, val2, code3) \
279 TEST_ARG_PTR(reg2, val2) \
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/arch/x86/include/asm/
H A Dmicrocode.h4 #define native_rdmsr(msr, val1, val2) \
8 (void)((val2) = (u32)(__val >> 32)); \
H A Dparavirt.h137 #define rdmsr(msr, val1, val2) \
142 val2 = _l >> 32; \
145 #define wrmsr(msr, val1, val2) \
147 paravirt_write_msr(msr, val1, val2); \
/arch/ia64/lib/
H A Dstrlen.S63 // For instance we don't need to look at a NaT in val2 if the zero byte
79 #define val2 r23 define
114 czx1.r val2=w[1] // search 0 byte from right following 8bytes
118 cmp.eq.and p6,p0=8,val2 // p6 = p6 and mask==8
136 tnat.nz.and p7,p0=val2 // test NaT if val2
137 (p7) br.cond.spnt .recover // jump to recovery if val2 is NaT
139 (p8) mov val1=val2 // the other test got us out of the loop
H A Dstrlen_user.S66 // For instance we don't need to look at a NaT in val2 if the zero byte
81 #define val2 r23 define
117 czx1.r val2=w[1] // search 0 byte from right following 8bytes
121 cmp.eq.and p6,p0=8,val2 // p6 = p6 and mask==8
139 tnat.nz.and p7,p0=val2 // test NaT if val2
140 (p7) br.cond.spnt .recover // jump to recovery if val2 is NaT
142 (p8) mov val1=val2 // val2 contains the value
H A Dcopy_user.S78 .rotr val1[PIPE_DEPTH],val2[PIPE_DEPTH]
344 EX(.failure_in1,(p8) ld4 val2[0]=[src1],4) // 4-byte aligned
353 EX(.failure_in1,(p9) ld8 val2[1]=[src1],8) // 8-byte aligned
357 EX(.failure_out, (p8) st4 [dst1]=val2[0],4)
361 EX(.failure_out, (p9) st8 [dst1]=val2[1],8)
376 (p16) ld8 val2[0]=[src2],16
379 (EPI) st8 [dst2]=val2[PIPE_DEPTH-1],16
395 EX(.failure_in1,(p8) ld2 val2[0]=[src1],2) // at least 2 bytes
400 EX(.failure_in1,(p9) ld1 val2[1]=[src1]) // only 1 byte left
406 EX(.failure_out, (p8) st2 [dst1]=val2[
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/arch/alpha/kernel/
H A Dsys_sable.c111 int port, val1, val2; local
116 val2 = 0xE0 | 4;
120 val2 = 0xE0 | 3;
124 val2 = 0xE0 | 1;
128 outb(val2, 0x534); /* ack the master */
/arch/ia64/include/uapi/asm/
H A Dintrinsics.h25 #define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
29 ia64_native_set_rr(0x4000000000000000UL, (val2)); \
/arch/blackfin/mach-bf609/
H A Dclock.c68 u32 val2; local
70 val2 = bfin_read32(reg);
71 val2 &= ~mask;
72 val2 |= val;
73 bfin_write32(reg, val2);
/arch/ia64/include/asm/
H A Dparavirt_privop.h46 unsigned long val2, unsigned long val3,
414 unsigned long val2, unsigned long val3,
419 register unsigned long __val2 asm ("r10") = val2;
413 paravirt_set_rr0_to_rr4(unsigned long val0, unsigned long val1, unsigned long val2, unsigned long val3, unsigned long val4) argument
/arch/mips/jz4740/
H A Dclock.c127 uint32_t val2; local
130 val2 = readl(jz_clock_base + reg);
131 val2 &= ~mask;
132 val2 |= val;
133 writel(val2, jz_clock_base + reg);
/arch/powerpc/lib/
H A Dsstep.c551 unsigned long val1, unsigned long val2,
554 unsigned long val = val1 + val2;
647 unsigned long int val, val2; local
1031 val2 = regs->gpr[rb];
1036 val2 = (int) val2;
1039 do_cmp_signed(regs, val, val2, rd >> 2);
1044 val2 = regs->gpr[rb];
1049 val2 = (unsigned int) val2;
550 add_with_carry(struct pt_regs *regs, int rd, unsigned long val1, unsigned long val2, unsigned long carry_in) argument
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/arch/powerpc/platforms/cell/
H A Dbeat_wrapper.h43 u64 val0, u64 val1, u64 val2, u64 val3)
46 val0, val1, val2, val3);
42 beat_set_interrupt_mask(u64 index, u64 val0, u64 val1, u64 val2, u64 val3) argument
/arch/sparc/kernel/
H A Dtime_64.c374 unsigned long val2; local
380 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
382 return ((long)(val2 - val)) > 0L;
/arch/cris/include/arch-v32/arch/hwregs/iop/
H A Diop_spu_defs.h124 unsigned int val2 : 5; member in struct:__anon635
/arch/ia64/kernel/
H A Dparavirt.c131 unsigned long val2, unsigned long val3,
134 ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4);
378 unsigned long val2, unsigned long val3,
130 ia64_native_set_rr0_to_rr4_func(unsigned long val0, unsigned long val1, unsigned long val2, unsigned long val3, unsigned long val4) argument
/arch/arm/plat-samsung/
H A Dadc.c62 unsigned val1, unsigned val2,

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