| /drivers/gpu/drm/nouveau/core/subdev/clock/ |
| H A D | pll.h | 5 int *N1, int *M1, int *N2, int *M2, int *P);
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| H A D | pllnv04.c | 152 int M1, N1, M2, N2, log2P; local
178 for (M2 = minM2; M2 <= maxM2; M2++) {
179 if (calcclk1/M2 < minU2)
181 if (calcclk1/M2 > maxU2)
185 N2 = (clkP * M2 + calcclk1/2) / calcclk1;
193 if (N2/M2 < 4 || N2/M2 > 10)
196 calcclk2 = calcclk1 * N2 / M2;
228 nv04_pll_calc(struct nouveau_subdev *subdev, struct nvbios_pll *info, u32 freq, int *N1, int *M1, int *N2, int *M2, int *P) argument
[all...] |
| H A D | nv04.c | 40 int N1, M1, N2, M2, P; local
41 int ret = nv04_pll_calc(nv_subdev(clock), info, clk, &N1, &M1, &N2, &M2, &P);
47 pv->M2 = M2;
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| H A D | nv40.c | 70 int M2 = (coef & 0x00ff0000) >> 16; local
79 if (M2)
80 clk = clk * N2 / M2;
131 int *N1, int *M1, int *N2, int *M2, int *log2P)
144 ret = nv04_pll_calc(nv_subdev(priv), &pll, clk, N1, M1, N2, M2, log2P);
156 int N1, M1, N2, M2, log2P; local
161 &N1, &M1, &N2, &M2, &log2P);
165 if (N2 == M2) {
170 priv->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
130 nv40_clock_calc_pll(struct nv40_clock_priv *priv, u32 reg, u32 clk, int *N1, int *M1, int *N2, int *M2, int *log2P) argument
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| H A D | nv50.c | 162 int N1, N2, M1, M2; local
171 M2 = (coef & 0x00ff0000) >> 16;
177 if (M2)
178 freq = freq * N2 / M2;
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| /drivers/gpu/drm/nouveau/core/include/subdev/bios/ |
| H A D | pll.h | 9 uint8_t N1, M1, N2, M2; member in struct:nouveau_pll_vals::__anon845::__anon846
11 uint8_t M1, N1, M2, N2;
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| /drivers/gpu/drm/nouveau/core/subdev/devinit/ |
| H A D | nv50.c | 39 int N1, M1, N2, M2, P; local
48 ret = nv04_pll_calc(nv_subdev(devinit), &info, freq, &N1, &M1, &N2, &M2, &P);
60 (M2 << 16) | N2);
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| H A D | nv04.c | 204 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */
211 (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4;
290 bool single_stage = !pv->NM2 || pv->N2 == pv->M2;
356 int N1, M1, N2, M2, P; local
364 &N1, &M1, &N2, &M2, &P);
372 pv.M2 = M2;
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| /drivers/gpu/drm/nouveau/core/subdev/fb/ |
| H A D | ramnv40.c | 43 int N1, M1, N2, M2; local
53 &N1, &M1, &N2, &M2, &log2P);
59 if (N2 == M2) {
64 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
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| H A D | ramnv50.c | 78 int N1, M1, N2, M2, P; local
139 &N1, &M1, &N2, &M2, &P);
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| H A D | ramnve0.c | 140 int N2, M2, P2; member in struct:nve0_ram
166 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2);
1001 &ram->N2, NULL, &ram->M2, &ram->P2);
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| /drivers/isdn/hardware/avm/ |
| H A D | Kconfig | 38 tristate "AVM B1/M1/M2 PCMCIA support"
44 tristate "AVM B1/M1/M2 PCMCIA cs module"
47 Enable the PCMCIA client driver for the AVM B1/M1/M2
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | hw.c | 141 pllvals->N2 = pllvals->M2 = 1;
155 pllvals->M2 = (pll1 >> 4) & 0x7;
208 if (!pv->M1 || !pv->M2)
211 return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P;
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| H A D | crtc.c | 159 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);
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