Searched refs:NV03_PFIFO_CACHE1_PUSH1 (Results 1 - 5 of 5) sorted by relevance
/drivers/gpu/drm/nouveau/core/engine/fifo/ |
H A D | nv04.c | 214 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max; 236 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max); 520 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max; 636 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max);
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H A D | nv04.h | 37 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
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H A D | nv17.c | 200 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max);
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H A D | nv40.c | 341 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH1, priv->base.max);
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/drivers/gpu/drm/nouveau/ |
H A D | nouveau_reg.h | 471 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
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