Searched refs:NV03_PFIFO_CACHE1_PUT (Results 1 - 3 of 3) sorted by relevance

/drivers/gpu/drm/nouveau/core/engine/fifo/
H A Dnv04.h43 #define NV03_PFIFO_CACHE1_PUT 0x00003210 macro
H A Dnv04.c235 nv_wr32(priv, NV03_PFIFO_CACHE1_PUT, 0);
/drivers/gpu/drm/nouveau/
H A Dnouveau_reg.h477 #define NV03_PFIFO_CACHE1_PUT 0x00003210 macro

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