/drivers/net/wireless/rtlwifi/rtl8192ee/ |
H A D | rf.c | 44 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 46 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK, 52 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 54 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
|
H A D | hw.c | 1235 RF_CHNLBW, RFREG_OFFSET_MASK); 1237 RF_CHNLBW, RFREG_OFFSET_MASK); 1243 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 1245 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
|
/drivers/net/wireless/rtlwifi/rtl8821ae/ |
H A D | rf.c | 41 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, BIT(11)|BIT(10), 3); 42 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, BIT(11)|BIT(10), 3); 45 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, BIT(11)|BIT(10), 1); 46 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, BIT(11)|BIT(10), 1); 49 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, BIT(11)|BIT(10), 0); 50 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, BIT(11)|BIT(10), 0);
|
/drivers/staging/rtl8188eu/hal/ |
H A D | rf.c | 35 phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 41 phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
|
H A D | phy.c | 350 param1 = RF_CHNLBW; 1387 lc_cal = phy_query_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits); 1390 phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits,
|
/drivers/net/wireless/rtlwifi/rtl8188ee/ |
H A D | rf.c | 44 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 50 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
|
/drivers/net/wireless/rtlwifi/rtl8192ce/ |
H A D | rf.c | 48 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 54 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
|
H A D | hw.c | 999 RF_CHNLBW, RFREG_OFFSET_MASK); 1001 RF_CHNLBW, RFREG_OFFSET_MASK);
|
/drivers/net/wireless/rtlwifi/rtl8192cu/ |
H A D | rf.c | 48 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 54 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
|
/drivers/net/wireless/rtlwifi/rtl8192se/ |
H A D | rf.c | 521 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 527 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
|
H A D | reg.h | 1117 #define RF_CHNLBW 0x18 macro
|
/drivers/net/wireless/rtlwifi/rtl8723ae/ |
H A D | rf.c | 44 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 50 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
|
/drivers/net/wireless/rtlwifi/rtl8723be/ |
H A D | rf.c | 44 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, 50 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
|
/drivers/staging/rtl8723au/hal/ |
H A D | rtl8723a_rf6052.c | 83 PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); 87 PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
|
H A D | rtl8723a_phycfg.c | 1086 param1 = RF_CHNLBW, param2 = channel */ 1087 param1 = RF_CHNLBW;
|
H A D | HalDMOutSrc8723A_CE.c | 914 LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); 917 PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
|
H A D | usb_halinit.c | 673 pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum RF_RADIO_PATH)0, RF_CHNLBW, bRFRegOffsetMask); 674 pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum RF_RADIO_PATH)1, RF_CHNLBW, bRFRegOffsetMask);
|
/drivers/net/wireless/rtlwifi/rtl8192de/ |
H A D | rf.c | 49 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(10) | 62 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(10) | BIT(11),
|
H A D | phy.c | 2608 rtl_set_rfreg(hw, (enum radio_path)index, RF_CHNLBW, 2631 rtl_set_rfreg(hw, (enum radio_path)index, RF_CHNLBW, 2792 RF_CHNLBW, channel, 0); 3519 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(8) | BIT(16) | 3526 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(8) | 3565 RF_CHNLBW, RFREG_OFFSET_MASK);
|
H A D | reg.h | 1236 #define RF_CHNLBW 0x18 macro
|
/drivers/staging/rtl8712/ |
H A D | rtl871x_mp.c | 392 set_rf_reg(pAdapter, RF_PATH_A, RF_CHNLBW, 396 set_rf_reg(pAdapter, RF_PATH_A, RF_CHNLBW,
|
H A D | rtl871x_mp_phy_regdef.h | 339 #define RF_CHNLBW 0x18 /* RF channel and BW switch */ macro
|
/drivers/staging/rtl8188eu/include/ |
H A D | Hal8188EPhyReg.h | 405 #define RF_CHNLBW 0x18 /* RF channel and BW switch */ macro
|
H A D | rtw_mp_phy_regdef.h | 364 #define RF_CHNLBW 0x18 /* RF channel and BW switch */ macro
|
/drivers/staging/rtl8723au/include/ |
H A D | Hal8723APhyReg.h | 360 #define RF_CHNLBW 0x18 /* RF channel and BW switch */ macro
|