Searched refs:SR (Results 1 - 24 of 24) sorted by relevance

/drivers/video/fbdev/via/
H A Dviamode.h29 unsigned char SR[StdSR]; member in struct:VPITTable
H A Dhw.c1813 via_write_reg(VIASR, i, VPIT.SR[i - 1]);
/drivers/macintosh/
H A Dvia-cuda.c46 #define SR (10*RS) /* Shift register */ macro
187 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
266 out_8(&via[ACR] ,(in_8(&via[ACR]) & ~SR_CTRL) | SR_EXT); /* SR data in */
267 (void)in_8(&via[SR]); /* clear any left-over data */
272 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
277 (void)in_8(&via[SR]);
288 (void)in_8(&via[SR]);
297 (void)in_8(&via[SR]);
428 out_8(&via[SR], req->data[0]);
483 (void)in_8(&via[SR]);
[all...]
H A Dvia-macii.c52 #define SR (10*RS) /* Shift register */ macro
187 x = via[SR];
362 via[SR] = req->data[1];
393 /* Clear the SR IRQ flag when polling. */
414 x = via[SR];
456 x = via[SR];
461 via[SR] = req->data[data_index++];
474 x = via[SR];
515 x = via[SR];
H A Dvia-maciisi.c37 #define SR (10*RS) /* Shift register */ macro
163 /* Poll for SR interrupt */
167 tmp = via[SR]; /* Clear shift register */
203 tmp = via[SR];
406 via[SR] = req->data[0];
474 tmp = via[SR];
489 /* via[SR]; */
499 tmp = via[SR];
516 tmp = via[SR];
543 via[SR]
[all...]
H A Dvia-pmu68k.c58 #define SR (10*RS) /* Shift register */ macro
512 via1[SR] = x;
522 c = via1[SR]; /* resets SR */
581 } else if (irq == IRQ_MAC_ADB_SR) { /* SR interrupt */
587 if ((via1[ACR] & SR_OUT) == 0) bite = via1[SR];
H A Dvia-pmu.c92 #define SR (10*RS) /* Shift register */ macro
1188 out_8(&v[SR], x);
1199 in_8(&v[SR]); /* resets SR */
1454 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1464 bite = in_8(&via[SR]);
2438 via[SR] = x; eieio();
2448 x = via[SR]; eieio();
2450 x = via[SR]; eieio();
/drivers/usb/misc/sisusbvga/
H A Dsisusb_struct.h71 unsigned char SR[4]; member in struct:SiS_StandTable
H A Dsisusb_init.c355 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
359 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
/drivers/video/fbdev/omap2/dss/
H A Ddispc.c261 #define SR(reg) \ macro
272 SR(IRQENABLE);
273 SR(CONTROL);
274 SR(CONFIG);
275 SR(LINE_NUMBER);
278 SR(GLOBAL_ALPHA);
280 SR(CONTROL2);
281 SR(CONFIG2);
284 SR(CONTROL3);
285 SR(CONFIG
492 #undef SR macro
[all...]
H A Ddss.c116 #define SR(reg) \ macro
125 SR(CONTROL);
129 SR(SDI_CONTROL);
130 SR(PLL_CONTROL);
156 #undef SR macro
/drivers/media/pci/ngene/
H A Dngene-core.c97 while (Cur->ngeneBuffer.SR.Flags & 0x80) {
100 if (Cur->ngeneBuffer.SR.Flags & 0x20)
106 Cur->ngeneBuffer.SR.
120 Cur->ngeneBuffer.SR.Flags &=
133 Cur->ngeneBuffer.SR.Flags &= ~0x40;
141 Cur->ngeneBuffer.SR.DTOUpdate =
150 if (Cur->ngeneBuffer.SR.Flags & 0x01)
152 if (Cur->ngeneBuffer.SR.Flags & 0x20)
158 Cur->ngeneBuffer.SR.Clock,
163 Cur->ngeneBuffer.SR
[all...]
H A Dngene.h188 struct BUFFER_STREAM_RESULTS SR; member in struct:BUFFER_HEADER
/drivers/spi/
H A Dspi-atmel.c93 /* Bitfields in SR */
522 while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
895 status = spi_readl(as, SR);
916 spi_readl(as, SR);
952 status = spi_readl(as, SR);
963 spi_readl(as, SR);
1147 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
1152 while (spi_readl(as, SR) & SPI_BIT(RDRF))
1156 spi_readl(as, SR);
1427 spi_readl(as, SR);
[all...]
/drivers/input/serio/
H A Dat32psif.c113 status = psif_readl(psif, SR);
140 while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--)
/drivers/net/ethernet/chelsio/
H A DKconfig105 adapters and T5 based 40Gb Ethernet adapters with PCI-E SR-IOV Virtual
/drivers/clocksource/
H A Dtcb_clksrc.c172 sr = __raw_readl(dev->regs + ATMEL_TC_REG(2, SR));
/drivers/misc/
H A Datmel-ssc.c188 ssc_readl(ssc->regs, SR);
/drivers/video/fbdev/sis/
H A Dvstruct.h134 unsigned char SR[4]; member in struct:SiS_StandTable_S
H A Dinit.c1840 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
1854 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
/drivers/rtc/
H A Drtc-at91sam9.c258 * SR clears it, so we must only read it in this irq handler!
261 sr = rtt_readl(rtc, SR) & (mr >> 16);
/drivers/mtd/nand/
H A Datmel_nand.c947 while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) {
980 while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) {
1359 ecc_status = ecc_readl(host->ecc, SR);
1578 u32 nfc_status = nfc_readl(host->nfc->hsmc_regs, SR);
2279 nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */
/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c2357 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1);
2393 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0);
2444 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1);
2459 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0);
/drivers/staging/xgifb/
H A Dvb_setmode.c76 SRdata = XGI330_StandTable.SR[i];
77 xgifb_reg_set(pVBInfo->P3c4, i+1, SRdata); /* Set SR 1 2 3 4 */

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