Searched refs:UTMIPLL_HW_PWRDN_CFG0 (Results 1 - 2 of 2) sorted by relevance

/drivers/clk/tegra/
H A Dclk-tegra114.c134 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro
1049 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
1053 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
1064 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
1067 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
1072 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
1074 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
H A Dclk-tegra124.c105 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro
1076 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
1080 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
1091 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
1094 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
1099 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
1101 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);

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