Searched refs:bus_clk_rate (Results 1 - 4 of 4) sorted by relevance

/drivers/i2c/busses/
H A Di2c-bcm2835.c223 u32 bus_clk_rate, divider; local
246 &bus_clk_rate);
250 bus_clk_rate = 100000;
253 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate);
H A Di2c-axxia.c93 * @bus_clk_rate: current i2c bus clock rate
104 u32 bus_clk_rate; member in struct:axxia_i2c_dev
133 u32 divisor = clk_get_rate(idev->i2c_clk) / idev->bus_clk_rate;
142 idev->bus_clk_rate, clk_mhz, divisor);
157 if (idev->bus_clk_rate <= 100000) {
491 of_property_read_u32(np, "clock-frequency", &idev->bus_clk_rate);
492 if (idev->bus_clk_rate == 0)
493 idev->bus_clk_rate = 100000; /* default clock rate */
H A Di2c-tegra.c154 * @bus_clk_rate: current i2c bus clock rate
174 u32 bus_clk_rate; member in struct:tegra_i2c_dev
608 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));
749 &i2c_dev->bus_clk_rate);
751 i2c_dev->bus_clk_rate = 100000; /* default clock rate */
787 i2c_dev->bus_clk_rate * clk_multiplier);
H A Di2c-at91.c734 u32 bus_clk_rate; local
781 &bus_clk_rate);
783 bus_clk_rate = DEFAULT_TWI_CLK_HZ;
785 at91_calc_twi_clock(dev, bus_clk_rate);

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