Searched refs:byte_offset (Results 1 - 18 of 18) sorted by relevance

/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_phy.h150 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
152 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
154 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
156 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
158 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
H A Dixgbe_phy.c1405 * @byte_offset: EEPROM byte offset to read
1410 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, argument
1413 return hw->phy.ops.read_i2c_byte(hw, byte_offset,
1421 * @byte_offset: byte offset at address 0xA2
1426 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, argument
1429 return hw->phy.ops.read_i2c_byte(hw, byte_offset,
1437 * @byte_offset: EEPROM byte offset to write
1442 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, argument
1445 return hw->phy.ops.write_i2c_byte(hw, byte_offset,
1453 * @byte_offset
1459 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, u8 *data) argument
1545 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, u8 data) argument
[all...]
H A Dixgbe_82598.c46 static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
988 * @byte_offset: byte offset to read from dev_addr
994 u8 byte_offset, u8 *eeprom_data)
1017 sfp_addr = (dev_addr << 8) + byte_offset;
1059 * @byte_offset: EEPROM byte offset to read
1064 static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, argument
1068 byte_offset, eeprom_data);
1074 * @byte_offset: byte offset at address 0xA2
1079 static s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset, argument
1083 byte_offset, sff8472_dat
993 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, u8 byte_offset, u8 *eeprom_data) argument
[all...]
H A Dixgbe_82599.c63 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
65 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
2186 * @byte_offset: byte offset to read
2192 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, argument
2222 status = ixgbe_read_i2c_byte_generic(hw, byte_offset, dev_addr, data);
2239 * @byte_offset: byte offset to write
2245 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, argument
2275 status = ixgbe_write_i2c_byte_generic(hw, byte_offset, dev_addr, data);
/drivers/gpu/drm/udl/
H A Dudl_drv.h111 u32 byte_offset, u32 device_byte_offset, u32 byte_width,
H A Dudl_transfer.c224 u32 byte_offset, u32 device_byte_offset,
236 line_start = (u8 *) (front + byte_offset);
222 udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, const char *front, char **urb_buf_ptr, u32 byte_offset, u32 device_byte_offset, u32 byte_width, int *ident_ptr, int *sent_ptr) argument
H A Dudl_fb.c225 const int byte_offset = line_offset + (x * bpp); local
229 &cmd, byte_offset, dev_byte_offset,
/drivers/net/ethernet/intel/igb/
H A De1000_82575.h31 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr,
33 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr,
H A Digb_main.c8017 * @byte_offset: byte offset to read
8024 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, argument
8040 status = i2c_smbus_read_byte_data(this_client, byte_offset);
8054 * @byte_offset: byte offset to write
8061 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, argument
8074 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
/drivers/input/touchscreen/
H A Datmel_mxt_ts.c1081 unsigned int type, instance, size, byte_offset; local
1160 byte_offset = reg + i - cfg_start_ofs;
1162 if (byte_offset >= 0 && byte_offset < config_mem_size) {
1163 *(config_mem + byte_offset) = val;
1166 reg, object->type, byte_offset);
1178 unsigned int byte_offset = 0; local
1182 while (byte_offset < config_mem_size) {
1183 unsigned int size = config_mem_size - byte_offset;
1189 cfg_start + byte_offset,
[all...]
/drivers/crypto/amcc/
H A Dcrypto4xx_sa.h155 u32 byte_offset:1; member in struct:sa_command_1::__anon500
/drivers/net/ethernet/
H A Dlantiq_etop.c527 u32 byte_offset; local
539 byte_offset = CPHYSADDR(skb->data) % 16;
546 DMA_TO_DEVICE)) - byte_offset;
549 LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
/drivers/video/fbdev/
H A Dudlfb.c520 u32 byte_offset, u32 byte_width,
524 u32 dev_addr = dev->base16 + byte_offset;
529 line_start = (u8 *) (front + byte_offset);
536 + byte_offset);
608 const int byte_offset = line_offset + (x * BPP); local
612 &cmd, byte_offset, width * BPP,
518 dlfb_render_hline(struct dlfb_data *dev, struct urb **urb_ptr, const char *front, char **urb_buf_ptr, u32 byte_offset, u32 byte_width, int *ident_ptr, int *sent_ptr) argument
H A Dsmscufx.c846 const int byte_offset = line_offset + (x * BPP); local
848 (char *)dev->info->fix.smem_start + byte_offset, width * BPP);
/drivers/hv/
H A Dchannel.c249 gpadl_header->range[0].byte_offset = 0;
331 gpadl_header->range[0].byte_offset = 0;
/drivers/gpu/drm/radeon/
H A Dradeon_state.c1710 u32 offset, byte_offset; local
1895 byte_offset = (image->y & ~2047) * blit_width;
1910 OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset >> 10)));
/drivers/mtd/onenand/
H A Donenand_base.c818 int byte_offset; local
824 byte_offset = offset + count;
827 word = this->read_word(bufferram + byte_offset);
829 this->write_word(word, bufferram + byte_offset);
/drivers/net/hyperv/
H A Dnetvsc.c913 recv_buf + vmxferpage_packet->ranges[i].byte_offset);

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