Searched refs:new_line (Results 1 - 9 of 9) sorted by relevance

/drivers/net/wan/
H A Dc101.c229 sync_serial_settings new_line; local
262 if (copy_from_user(&new_line, line, size))
265 if (new_line.clock_type != CLOCK_EXT &&
266 new_line.clock_type != CLOCK_TXFROMRX &&
267 new_line.clock_type != CLOCK_INT &&
268 new_line.clock_type != CLOCK_TXINT)
271 if (new_line.loopback != 0 && new_line.loopback != 1)
274 memcpy(&port->settings, &new_line, size); /* Update settings */
H A Dpci200syn.c189 sync_serial_settings new_line; local
218 if (copy_from_user(&new_line, line, size))
221 if (new_line.clock_type != CLOCK_EXT &&
222 new_line.clock_type != CLOCK_TXFROMRX &&
223 new_line.clock_type != CLOCK_INT &&
224 new_line.clock_type != CLOCK_TXINT)
227 if (new_line.loopback != 0 && new_line.loopback != 1)
230 memcpy(&port->settings, &new_line, size); /* Update settings */
H A Dn2.c252 sync_serial_settings new_line; local
280 if (copy_from_user(&new_line, line, size))
283 if (new_line.clock_type != CLOCK_EXT &&
284 new_line.clock_type != CLOCK_TXFROMRX &&
285 new_line.clock_type != CLOCK_INT &&
286 new_line.clock_type != CLOCK_TXINT)
289 if (new_line.loopback != 0 && new_line.loopback != 1)
292 memcpy(&port->settings, &new_line, size); /* Update settings */
H A Dpc300too.c197 sync_serial_settings new_line; local
243 if (copy_from_user(&new_line, line, size))
246 if (new_line.clock_type != CLOCK_EXT &&
247 new_line.clock_type != CLOCK_TXFROMRX &&
248 new_line.clock_type != CLOCK_INT &&
249 new_line.clock_type != CLOCK_TXINT)
252 if (new_line.loopback != 0 && new_line.loopback != 1)
255 memcpy(&port->settings, &new_line, size); /* Update settings */
H A Dixp4xx_hss.c1248 sync_serial_settings new_line; local
1264 memset(&new_line, 0, sizeof(new_line));
1265 new_line.clock_type = port->clock_type;
1266 new_line.clock_rate = port->clock_rate;
1267 new_line.loopback = port->loopback;
1268 if (copy_to_user(line, &new_line, size))
1276 if (copy_from_user(&new_line, line, size))
1279 clk = new_line.clock_type;
1286 if (new_line
[all...]
/drivers/char/pcmcia/
H A Dsynclink_cs.c4106 sync_serial_settings new_line; local
4121 memset(&new_line, 0, size);
4138 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4139 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4140 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4141 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4142 default: new_line.clock_type = CLOCK_DEFAULT;
4145 new_line.clock_rate = info->params.clock_speed;
4146 new_line.loopback = info->params.loopback ? 1:0;
4148 if (copy_to_user(line, &new_line, siz
[all...]
/drivers/tty/
H A Dsynclink.c7836 sync_serial_settings new_line; local
7865 memset(&new_line, 0, sizeof(new_line));
7867 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
7868 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
7869 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
7870 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
7871 default: new_line.clock_type = CLOCK_DEFAULT;
7874 new_line.clock_rate = info->params.clock_speed;
7875 new_line
[all...]
H A Dsynclink_gt.c1624 sync_serial_settings new_line; local
1638 memset(&new_line, 0, sizeof(new_line));
1655 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
1656 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
1657 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
1658 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
1659 default: new_line.clock_type = CLOCK_DEFAULT;
1662 new_line.clock_rate = info->params.clock_speed;
1663 new_line
[all...]
H A Dsynclinkmp.c1740 sync_serial_settings new_line; local
1769 memset(&new_line, 0, sizeof(new_line));
1771 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
1772 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
1773 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
1774 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
1775 default: new_line.clock_type = CLOCK_DEFAULT;
1778 new_line.clock_rate = info->params.clock_speed;
1779 new_line
[all...]

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