/drivers/base/ |
H A D | pinctrl.c | 26 dev->pins = devm_kzalloc(dev, sizeof(*(dev->pins)), GFP_KERNEL); 27 if (!dev->pins) 30 dev->pins->p = devm_pinctrl_get(dev); 31 if (IS_ERR(dev->pins->p)) { 33 ret = PTR_ERR(dev->pins->p); 37 dev->pins->default_state = pinctrl_lookup_state(dev->pins->p, 39 if (IS_ERR(dev->pins->default_state)) { 45 ret = pinctrl_select_state(dev->pins [all...] |
/drivers/pinctrl/ |
H A D | pinctrl-adi2.h | 17 * @pins: an array of pins 18 * @num: the number of pins in this array 22 const unsigned *pins; member in struct:adi_pin_group 30 .pins = p, \ 61 * @pins: An array describing all pins the pin controller affects. 62 * @npins: The number of entries in @pins. 69 const struct pinctrl_pin_desc *pins; member in struct:adi_pinctrl_soc_data
|
H A D | pinctrl-tegra.h | 82 * @pins An array of pin IDs included in this pin group. 83 * @npins The number of entries in @pins. 122 * A representation of a group of pins (possibly just one pin) in the Tegra 131 const unsigned *pins; member in struct:tegra_pingroup 166 * @ngpios: The number of GPIO pins the pin controller HW affects. 167 * @pins: An array describing all pins the pin controller affects. 168 * All pins which are also GPIOs must be listed first within the 171 * @npins: The numbmer of entries in @pins. 179 const struct pinctrl_pin_desc *pins; member in struct:tegra_pinctrl_soc_data [all...] |
H A D | pinctrl-lantiq.c | 38 const unsigned **pins, 44 *pins = info->grps[selector].pins; 73 struct property *pins = of_find_property(np, "lantiq,pins", NULL); local 82 if (!pins && !groups) { 83 dev_err(pctldev->dev, "%s defines neither pins nor groups\n", 88 if (pins && groups) { 89 dev_err(pctldev->dev, "%s defines both pins and groups\n", 118 of_property_for_each_string(np, "lantiq,pins", pro 36 ltq_get_group_pins(struct pinctrl_dev *pctrldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument [all...] |
/drivers/pinctrl/samsung/ |
H A D | pinctrl-exynos.h | 50 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ 54 .nr_pins = pins, \ 59 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \ 63 .nr_pins = pins, \ 69 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \ 73 .nr_pins = pins, \
|
H A D | pinctrl-s3c64xx.c | 101 #define PIN_BANK_4BIT(pins, reg, id) \ 105 .nr_pins = pins, \ 110 #define PIN_BANK_4BIT_EINTG(pins, reg, id, eoffs) \ 114 .nr_pins = pins, \ 117 .eint_mask = (1 << (pins)) - 1, \ 122 #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) \ 126 .nr_pins = pins, \ 134 #define PIN_BANK_4BIT2_EINTG(pins, reg, id, eoffs) \ 138 .nr_pins = pins, \ 141 .eint_mask = (1 << (pins)) 209 u8 pins[NUM_EINT0]; member in struct:s3c64xx_eint0_data [all...] |
/drivers/video/fbdev/matrox/ |
H A D | matroxfb_misc.c | 390 static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) { argument 391 unsigned int b0 = readb(pins); 393 if (b0 == 0x2E && readb(pins+1) == 0x41) { 394 unsigned int pins_len = readb(pins+2); 397 unsigned char* dst = bd->pins; 407 cksum += *dst++ = readb(pins+i); 413 } else if (b0 == 0x40 && readb(pins+1) == 0x00) { 415 unsigned char* dst = bd->pins; 420 *dst++ = readb(pins+i); 534 switch (bd->pins[2 [all...] |
/drivers/pinctrl/freescale/ |
H A D | pinctrl-imx1.h | 35 * @pins: an array of imx1_pin structs used in this group 36 * @npins: the number of pins in this group array, i.e. the number of 37 * elements in .pins so we can iterate over that array 42 struct imx1_pin *pins; member in struct:imx1_pin_group 60 const struct pinctrl_pin_desc *pins; member in struct:imx1_pinctrl_soc_info
|
H A D | pinctrl-imx.h | 40 * @npins: the number of pins in this group array, i.e. the number of 41 * elements in .pins so we can iterate over that array 43 * @pins: array of pins 49 struct imx_pin *pins; member in struct:imx_pin_group 76 const struct pinctrl_pin_desc *pins; member in struct:imx_pinctrl_soc_info
|
H A D | pinctrl-imx1-core.c | 68 * IMX1 IOMUXC manages the pins based on ports. Each port has 32 pins. IOMUX 73 * bit position and pin id. If they are represented by 2 bit, the lower 16 pins 74 * are in the first register and the upper 16 pins in the second (next) 107 /* Get current state of pins */ 127 /* Get current state of pins */ 195 const unsigned int **pins, 204 *pins = info->groups[selector].pin_ids; 238 * config maps for pins 273 pin_get_name(pctldev, grp->pins[ 194 imx1_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned int **pins, unsigned *npins) argument 306 const struct imx1_pin *pins; local [all...] |
H A D | pinctrl-mxs.h | 65 unsigned int *pins; member in struct:mxs_group 79 const struct pinctrl_pin_desc *pins; member in struct:mxs_pinctrl_soc_data
|
H A D | pinctrl-imx.c | 80 const unsigned **pins, 89 *pins = info->groups[selector].pin_ids; 115 * config maps for pins 125 if (!(grp->pins[i].config & IMX_NO_PAD_CTL)) 150 if (!(grp->pins[i].config & IMX_NO_PAD_CTL)) { 153 pin_get_name(pctldev, grp->pins[i].pin); 154 new_map[j].data.configs.configs = &grp->pins[i].config; 203 struct imx_pin *pin = &grp->pins[i]; 209 info->pins[pin_id].name); 313 info->pins[pin_i 79 imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *npins) argument [all...] |
/drivers/pinctrl/qcom/ |
H A D | pinctrl-msm.h | 33 * @pins: A list of pins assigned to this pingroup. 34 * @npins: Number of entries in @pins. 67 const unsigned *pins; member in struct:msm_pingroup 102 * @pins: An array describing all pins the pin controller affects. 103 * @npins: The number of entries in @pins. 111 const struct pinctrl_pin_desc *pins; member in struct:msm_pinctrl_soc_data
|
/drivers/soc/qcom/ |
H A D | Kconfig | 10 devices to the output pins.
|
/drivers/pinctrl/spear/ |
H A D | pinctrl-spear3xx.c | 16 /* pins */ 41 .pins = firda_pins, 74 .pins = i2c_pins, 107 .pins = ssp_cs_pins, 140 .pins = ssp_pins, 174 .pins = mii_pins, 207 .pins = gpio0_pin0_pins, 233 .pins = gpio0_pin1_pins, 259 .pins = gpio0_pin2_pins, 285 .pins [all...] |
H A D | pinctrl-spear310.c | 43 .pins = emi_cs_0_to_5_pins, 75 .pins = uart1_pins, 107 .pins = uart2_pins, 139 .pins = uart3_pins, 171 .pins = uart4_pins, 203 .pins = uart5_pins, 235 .pins = fsmc_pins, 267 .pins = rs485_0_pins, 299 .pins = rs485_1_pins, 331 .pins [all...] |
H A D | pinctrl-spear1340.c | 21 /* pins */ 262 .pins = pads_as_gpio_pins, 295 .pins = fsmc_8bit_pins, 324 .pins = fsmc_16bit_pins, 355 .pins = fsmc_pnor_pins, 393 .pins = keyboard_row_col_pins, 422 .pins = keyboard_col5_pins, 455 .pins = spdif_in_pins, 491 .pins = spdif_out_pins, 531 .pins [all...] |
H A D | pinctrl-spear300.c | 181 .pins = fsmc_2chips_pins, 208 .pins = fsmc_4chips_pins, 243 .pins = clcd_lcdmode_pins, 269 .pins = clcd_pfmode_pins, 307 .pins = tdm_pins, 343 .pins = i2c_clk_pins, 376 .pins = caml_pins, 402 .pins = camu_pins, 436 .pins = dac_pins, 472 .pins [all...] |
H A D | pinctrl-spear320.c | 502 .pins = clcd_pins, 585 .pins = emi_pins, 631 .pins = fsmc_8bit_pins, 678 .pins = fsmc_16bit_pins, 724 .pins = spp_pins, 769 .pins = sdhci_led_pins, 872 .pins = sdhci_cd_12_pins, 878 .pins = sdhci_cd_51_pins, 934 .pins = i2s_pins, 980 .pins [all...] |
/drivers/pinctrl/vt8500/ |
H A D | pinctrl-wmt.h | 39 .pins = __data, \ 55 const unsigned int *pins; member in struct:wmt_pinctrl_group 66 const struct pinctrl_pin_desc *pins; member in struct:wmt_pinctrl_data
|
/drivers/media/radio/ |
H A D | lm7000.h | 21 void (*set_pins)(void *handle, u8 pins)) 20 lm7000_set_freq(u32 freq, void *handle, void (*set_pins)(void *handle, u8 pins)) argument
|
H A D | radio-aztech.c | 67 static void aztech_set_pins(void *handle, u8 pins) argument 73 if (pins & LM7000_DATA) 75 if (pins & LM7000_CLK) 77 if (pins & LM7000_CE)
|
/drivers/staging/iio/resolver/ |
H A D | ad2s1200.c | 108 unsigned short *pins = spi->dev.platform_data; local 111 ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT, 115 pins[pn]); 126 st->sample = pins[0]; 127 st->rdvel = pins[1];
|
/drivers/pinctrl/sh-pfc/ |
H A D | pinctrl.c | 41 struct pinctrl_pin_desc *pins; member in struct:sh_pfc_pinctrl 61 const unsigned **pins, unsigned *num_pins) 65 *pins = pmx->pfc->info->groups[selector].pins; 135 /* Count the number of pins and groups and reallocate mappings. */ 136 ret = of_property_count_strings(np, "renesas,pins"); 140 dev_err(dev, "Invalid pins list in DT\n"); 176 /* Iterate over pins and groups and create the mappings. */ 201 of_property_for_each_string(np, "renesas,pins", prop, pin) { 328 int idx = sh_pfc_get_pin_index(pfc, grp->pins[ 60 sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument 550 const unsigned int *pins; local [all...] |
/drivers/pinctrl/mvebu/ |
H A D | pinctrl-mvebu.h | 20 * @npins: number of pins controlled by this control 26 * A mpp_ctrl describes a muxable unit, e.g. pin, group of pins, or 33 * to allow pin settings with varying gpio pins. 39 unsigned *pins; member in struct:mvebu_mpp_ctrl 121 .pins = (unsigned[_idh - _idl + 1]) { }, \ 133 .pins = (unsigned[_idh - _idl + 1]) { }, \
|