Searched refs:reset (Results 1 - 25 of 595) sorted by relevance

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/drivers/reset/sti/
H A DMakefile1 obj-$(CONFIG_STI_RESET_SYSCFG) += reset-syscfg.o
3 obj-$(CONFIG_STIH415_RESET) += reset-stih415.o
4 obj-$(CONFIG_STIH416_RESET) += reset-stih416.o
H A Dreset-syscfg.h15 #include <linux/reset-controller.h>
19 * reset controller.
23 * @reset: Regmap field description of the channel's reset bit.
28 struct reg_field reset; member in struct:syscfg_reset_channel_data
34 .reset = REG_FIELD(_rr, _rb, _rb), \
39 .reset = REG_FIELD(_rr, _rb, _rb), }
42 * Description of a system configuration register based reset controller.
44 * @wait_for_ack: The controller will wait for reset assert and de-assert to
47 * the reset bi
[all...]
H A Dreset-syscfg.c21 #include "reset-syscfg.h"
26 * @reset: regmap field for the channel's reset bit.
30 struct regmap_field *reset; member in struct:syscfg_reset_channel
35 * A reset controller which groups together a set of related reset bits, which
38 * @rst: base reset controller structure.
40 * the reset bit puts the hardware into reset.
41 * @channels: An array of reset channel
[all...]
/drivers/reset/
H A DMakefile2 obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
3 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
/drivers/clk/qcom/
H A Dcommon.c18 #include <linux/reset-controller.h>
23 #include "reset.h"
26 struct qcom_reset_controller reset; member in struct:qcom_cc
70 struct qcom_reset_controller *reset; local
100 reset = &cc->reset;
101 reset->rcdev.of_node = dev->of_node;
102 reset->rcdev.ops = &qcom_reset_ops;
103 reset->rcdev.owner = dev->driver->owner;
104 reset
[all...]
H A Dreset.h17 #include <linux/reset-controller.h>
H A Dreset.c17 #include <linux/reset-controller.h>
20 #include "reset.h"
59 .reset = qcom_reset,
/drivers/net/can/softing/
H A Dsofting_platform.h33 * reset() function
34 * bring pdev in or out of reset, depending on value
36 int (*reset)(struct platform_device *pdev, int value); member in struct:softing_platform_data
H A Dsofting_cs.c49 .reset = softingcs_reset,
61 .reset = softingcs_reset,
73 .reset = softingcs_reset,
85 .reset = softingcs_reset,
97 .reset = softingcs_reset,
109 .reset = softingcs_reset,
121 .reset = softingcs_reset,
133 .reset = softingcs_reset,
145 .reset = softingcs_reset,
/drivers/net/ethernet/mellanox/mlx4/
H A Dreset.c44 void __iomem *reset; local
66 * save off the PCI header before reset and then restore it
91 reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE,
93 if (!reset) {
95 mlx4_err(dev, "Couldn't map HCA reset register, aborting\n");
102 sem = readl(reset + MLX4_SEM_OFFSET);
112 iounmap(reset);
116 /* actually hit reset */
117 writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);
118 iounmap(reset);
[all...]
/drivers/power/reset/
H A DMakefile3 obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
4 obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
18 obj-$(CONFIG_POWER_RESET_KEYSTONE) += keystone-reset.o
/drivers/media/pci/mantis/
H A Dhopper_vp3028.c50 mantis_gpio_set_bits(mantis, config->reset, 0);
54 mantis_gpio_set_bits(mantis, config->reset, 1);
87 .reset = GPIF_A03,
H A Dmantis_vp3030.c62 mantis_gpio_set_bits(mantis, config->reset, 0);
66 mantis_gpio_set_bits(mantis, config->reset, 1);
102 .reset = GPIF_A13,
/drivers/watchdog/
H A Dmena21_wdt.c47 int reset = 0; local
49 reset |= gpio_get_value(drv->gpios[GPIO_WD_RST0]) ? (1 << 0) : 0;
50 reset |= gpio_get_value(drv->gpios[GPIO_WD_RST1]) ? (1 << 1) : 0;
51 reset |= gpio_get_value(drv->gpios[GPIO_WD_RST2]) ? (1 << 2) : 0;
53 return reset;
151 unsigned int reset = 0; local
201 reset = a21_wdt_get_bootstatus(drv);
202 if (reset == 2)
204 else if (reset == 4)
206 else if (reset
[all...]
/drivers/gpu/drm/i915/
H A Di915_params.c47 .reset = true,
108 module_param_named(reset, i915.reset, bool, 0600);
109 MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
/drivers/media/dvb-frontends/
H A Dor51211.h36 void (*reset)(struct dvb_frontend * fe); member in struct:or51211_config
/drivers/isdn/hisax/
H A Disurf.c126 release_region(cs->hw.isurf.reset, 1);
136 byteout(cs->hw.isurf.reset, chips); /* Reset On */
138 byteout(cs->hw.isurf.reset, ISURF_ISAR_EA); /* Reset Off */
212 cs->hw.isurf.reset = card->para[1];
238 cs->hw.isurf.reset = pnp_port_start(pnp_d, 0);
241 if (!cs->irq || !cs->hw.isurf.reset || !cs->hw.isurf.phymem) {
243 cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem);
260 if (!request_region(cs->hw.isurf.reset, 1, "isurf isdn")) {
263 cs->hw.isurf.reset);
271 release_region(cs->hw.isurf.reset,
[all...]
/drivers/net/wireless/brcm80211/brcmfmac/
H A Dchip.h84 void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset);
85 void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset,
/drivers/media/usb/dvb-usb/
H A Ddvb-usb-firmware.c39 u8 reset; local
43 reset = 1;
44 if ((ret = usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1)) != 1)
66 reset = 0;
67 if (ret || usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1) != 1) {
/drivers/phy/
H A Dphy-exynos-mipi-video.c53 u32 reg, reset; local
58 reset = EXYNOS_MIPI_PHY_MRESETN;
60 reset = EXYNOS_MIPI_PHY_SRESETN;
65 reg |= reset;
67 reg &= ~reset;
/drivers/input/keyboard/
H A Dsunkbd.c85 volatile s8 reset; member in struct:sunkbd
99 if (sunkbd->reset <= -1) {
101 * If cp[i] is 0xff, sunkbd->reset will stay -1.
104 sunkbd->reset = data;
119 sunkbd->reset = -1;
196 sunkbd->reset = -2;
198 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ);
199 if (sunkbd->reset < 0)
202 sunkbd->type = sunkbd->reset;
227 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >
[all...]
/drivers/net/wireless/cw1200/
H A Dcw1200_sdio.c191 if (pdata->reset) {
192 gpio_set_value(pdata->reset, 0);
194 gpio_free(pdata->reset);
208 if (pdata->reset) {
209 gpio_request(pdata->reset, "cw1200_wlan_reset");
210 gpio_direction_output(pdata->reset, 0);
216 if (pdata->reset || pdata->powerup)
242 if (pdata->reset) {
243 gpio_set_value(pdata->reset, 1);
H A Dcw1200_spi.c287 if (pdata->reset) {
288 gpio_set_value(pdata->reset, 0);
290 gpio_free(pdata->reset);
304 if (pdata->reset) {
305 gpio_request(pdata->reset, "cw1200_wlan_reset");
306 gpio_direction_output(pdata->reset, 0);
312 if (pdata->reset || pdata->powerup)
338 if (pdata->reset) {
339 gpio_set_value(pdata->reset, 1);
/drivers/gpu/drm/gma500/
H A Dmdfld_output.h58 int (*reset)(int pipe); member in struct:panel_funcs
/drivers/gpu/drm/nouveau/core/include/subdev/
H A Dgpio.h28 void (*reset)(struct nouveau_gpio *, u8 func); member in struct:nouveau_gpio

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