Searched refs:rx_ctrl (Results 1 - 19 of 19) sorted by relevance

/drivers/net/ethernet/brocade/bna/
H A Dbnad_ethtool.c663 if (bnad->rx_info[i].rx_ctrl[j].ccb &&
664 bnad->rx_info[i].rx_ctrl[j].ccb->
666 bnad->rx_info[i].rx_ctrl[j].ccb->
747 if (bnad->rx_info[i].rx_ctrl[j].ccb &&
748 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
749 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1]->rxq)
772 if (bnad->rx_info[i].rx_ctrl[j].ccb &&
773 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
774 bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0]->rxq) {
775 buf[bi++] = bnad->rx_info[i].rx_ctrl[
[all...]
H A Dbnad.c595 struct bnad_rx_ctrl *rx_ctrl = ccb->ctrl; local
633 skb = napi_get_frags(&rx_ctrl->napi);
717 napi_gro_frags(&rx_ctrl->napi);
729 napi_gro_flush(&rx_ctrl->napi, false);
743 struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb->ctrl); local
744 struct napi_struct *napi = &rx_ctrl->napi;
748 rx_ctrl->rx_schedule++;
800 struct bnad_rx_ctrl *rx_ctrl; local
839 rx_ctrl = &rx_info->rx_ctrl[
1165 struct bnad_rx_ctrl *rx_ctrl; local
1189 struct bnad_rx_ctrl *rx_ctrl; local
1224 struct bnad_rx_ctrl *rx_ctrl; local
1248 struct bnad_rx_ctrl *rx_ctrl; local
1758 struct bnad_rx_ctrl *rx_ctrl; local
1873 struct bnad_rx_ctrl *rx_ctrl = local
1902 struct bnad_rx_ctrl *rx_ctrl; local
3392 struct bnad_rx_ctrl *rx_ctrl; local
[all...]
H A Dbnad.h218 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX]; member in struct:bnad_rx_info
/drivers/tty/serial/
H A Dcrisv10.h56 u8 rx_ctrl; /* shadow for R_SERIALx_REC_CTRL */ member in struct:e100_serial
H A Dcrisv10.c248 .rx_ctrl = DEF_RX,
300 .rx_ctrl = DEF_RX,
355 .rx_ctrl = DEF_RX,
408 .rx_ctrl = DEF_RX,
933 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1070 info->rx_ctrl &= ~E100_RTS_MASK;
1071 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1072 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
1117 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1125 (info->rx_ctrl |
[all...]
/drivers/net/wireless/ath/carl9170/
H A Dmac.c309 u32 rx_ctrl = AR9170_MAC_RX_CTRL_DEAGG | local
330 rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
334 rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
338 rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
349 * rx_ctrl |= AR9170_MAC_RX_CTRL_ACK_IN_SNIFFER;
362 rx_ctrl |= AR9170_MAC_RX_CTRL_PASS_TO_HOST;
390 carl9170_regwrite(AR9170_MAC_REG_RX_CONTROL, rx_ctrl);
/drivers/net/ethernet/atheros/alx/
H A Dhw.c388 hw->rx_ctrl &= ~(ALX_MAC_CTRL_RX_EN | ALX_MAC_CTRL_TX_EN);
389 alx_write_mem32(hw, ALX_MAC_CTRL, hw->rx_ctrl);
480 alx_write_mem32(hw, ALX_MAC_CTRL, hw->rx_ctrl);
616 mac = hw->rx_ctrl;
625 hw->rx_ctrl = mac;
632 hw->rx_ctrl |= ALX_MAC_CTRL_RXFC_EN;
634 hw->rx_ctrl &= ~ALX_MAC_CTRL_RXFC_EN;
637 hw->rx_ctrl |= ALX_MAC_CTRL_TXFC_EN;
639 hw->rx_ctrl &= ~ALX_MAC_CTRL_TXFC_EN;
641 alx_write_mem32(hw, ALX_MAC_CTRL, hw->rx_ctrl);
[all...]
H A Dhw.h396 u64 rx_ctrl; /* RX control packets other than pause frames */ member in struct:alx_hw_stats
476 u32 rx_ctrl; member in struct:alx_hw
H A Dmain.c475 hw->rx_ctrl &= ~(ALX_MAC_CTRL_MULTIALL_EN | ALX_MAC_CTRL_PROMISC_EN);
477 hw->rx_ctrl |= ALX_MAC_CTRL_PROMISC_EN;
479 hw->rx_ctrl |= ALX_MAC_CTRL_MULTIALL_EN;
481 alx_write_mem32(hw, ALX_MAC_CTRL, hw->rx_ctrl);
723 hw->rx_ctrl = ALX_MAC_CTRL_WOLSPED_SWEN |
779 alx_write_mem32(hw, ALX_MAC_CTRL, hw->rx_ctrl);
/drivers/net/hippi/
H A Drrunner.c668 rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
669 rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
670 rrpriv->rx_ctrl[4].mode = 8;
671 rrpriv->rx_ctrl[4].pi = 0;
673 set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
1158 memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
1195 rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
1198 if (!rrpriv->rx_ctrl) {
1203 memset(rrpriv->rx_ctrl, 0, 256*sizeof(struct ring_ctrl));
1252 if (rrpriv->rx_ctrl) {
[all...]
H A Drrunner.h811 struct ring_ctrl *rx_ctrl; /* Receive ring control */ member in struct:rr_private
/drivers/net/ethernet/seeq/
H A Dsgiseeq.c134 hregs->rx_ctrl = hregs->tx_ctrl = 0;
146 hregs->rx_ctrl = HPC3_ERXCTRL_ACTIVE;
276 printk("RREGS: rx_cbptr[%08x] rx_ndptr[%08x] rx_ctrl[%08x]\n",
277 hregs->rx_cbptr, hregs->rx_ndptr, hregs->rx_ctrl);
330 if (!(hregs->rx_ctrl & HPC3_ERXCTRL_ACTIVE)) {
/drivers/net/ethernet/atheros/atl1c/
H A Datl1c.h318 unsigned long rx_ctrl; /* The number of Control packet received other than Pause frame. */ member in struct:atl1c_hw_stats
/drivers/net/ethernet/atheros/atl1e/
H A Datl1e.h265 unsigned long rx_ctrl; /* The number of Control packet received other than Pause frame. */ member in struct:atl1e_hw_stats
/drivers/net/wireless/
H A Dmwl8k.c947 __u8 rx_ctrl; member in struct:mwl8k_rxd_ap
968 rxd->rx_ctrl = MWL8K_AP_RX_CTRL_OWNED_BY_HOST;
978 rxd->rx_ctrl = 0;
987 if (!(rxd->rx_ctrl & MWL8K_AP_RX_CTRL_OWNED_BY_HOST))
1054 __u8 rx_ctrl; member in struct:mwl8k_rxd_sta
1078 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
1088 rxd->rx_ctrl = 0;
1098 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
1131 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1132 (rxd->rx_ctrl
[all...]
/drivers/net/ethernet/atheros/atlx/
H A Datl1.h328 u32 rx_ctrl; /* RX control packets other than pause frames */ member in struct:stats_msg_block
/drivers/net/ethernet/nvidia/
H A Dforcedeth.c1533 u32 rx_ctrl = readl(base + NvRegReceiverControl); local
1537 rx_ctrl &= ~NVREG_RCVCTL_START;
1538 writel(rx_ctrl, base + NvRegReceiverControl);
1543 rx_ctrl |= NVREG_RCVCTL_START;
1545 rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN;
1546 writel(rx_ctrl, base + NvRegReceiverControl);
1554 u32 rx_ctrl = readl(base + NvRegReceiverControl); local
1557 rx_ctrl &= ~NVREG_RCVCTL_START;
1559 rx_ctrl |= NVREG_RCVCTL_RX_PATH_EN;
1560 writel(rx_ctrl, bas
[all...]
/drivers/net/wireless/ti/wlcore/
H A Dacx.h527 __le32 rx_ctrl; member in struct:wl1271_acx_mem_map
/drivers/video/fbdev/mmp/hw/
H A Dmmp_ctrl.h1106 u32 rx_ctrl; member in struct:dsi_regs

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