Searched refs:src_w (Results 1 - 25 of 35) sorted by relevance

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/drivers/media/platform/ti-vpe/
H A Dsc.c64 void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w, argument
73 if (dst_w > src_w) {
76 if ((dst_w << 1) < src_w)
78 if ((dst_w << 1) < src_w)
81 if (dst_w == src_w) {
84 sixteenths = (dst_w << 4) / src_w;
158 u32 *sc_reg17, unsigned int src_w, unsigned int src_h,
188 if (src_w == dst_w && src_h == dst_h) {
200 dcm_x = src_w / dst_w;
212 lin_acc_inc = div64_u64(((u64)(src_w >> dcm_shif
157 sc_config_scaler(struct sc_data *sc, u32 *sc_reg0, u32 *sc_reg8, u32 *sc_reg17, unsigned int src_w, unsigned int src_h, unsigned int dst_w, unsigned int dst_h) argument
[all...]
H A Dsc.h199 void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w,
204 u32 *sc_reg17, unsigned int src_w, unsigned int src_h,
/drivers/gpu/drm/exynos/
H A Dexynos_drm_plane.h16 uint32_t src_w, uint32_t src_h);
H A Dexynos_drm_plane.c76 uint32_t src_w, uint32_t src_h)
120 overlay->src_width = src_w;
182 uint32_t src_w, uint32_t src_h)
188 src_w >> 16, src_h >> 16);
72 exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
178 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
/drivers/gpu/drm/msm/mdp/mdp4/
H A Dmdp4_plane.c45 uint32_t src_w, uint32_t src_h)
58 src_x, src_y, src_w, src_h);
130 uint32_t src_w, uint32_t src_h)
143 src_w = src_w >> 16;
147 fb->base.id, src_x, src_y, src_w, src_h,
150 if (src_w != crtc_w) {
161 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
40 mdp4_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
125 mdp4_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
H A Dmdp4_kms.h204 uint32_t src_w, uint32_t src_h);
/drivers/media/pci/ivtv/
H A Divtv-yuv.c241 ("Adjust to width %d src_w %d dst_w %d src_x %d dst_x %d\n",
242 f->tru_w, f->src_w, f->dst_w, f->src_x, f->dst_x);
245 x_cutoff = f->src_w + f->src_x;
269 if (f->dst_w >= f->src_w)
275 if (f->dst_w < f->src_w)
281 reg_2870_offset = (f->src_x * ((f->dst_w << 21) / f->src_w)) >> 19;
283 if (f->dst_w >= f->src_w) {
285 master_width = (f->src_w * 0x00200000) / (f->dst_w);
286 if (master_width * f->dst_w != f->src_w * 0x00200000)
297 (src_w
[all...]
/drivers/gpu/drm/i915/
H A Dintel_sprite.c147 uint32_t src_w, uint32_t src_h)
223 intel_update_sprite_watermarks(dplane, crtc, src_w, src_h,
225 src_w != crtc_w || src_h != crtc_h);
228 src_w--;
243 x += src_w;
245 linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
357 uint32_t src_w, uint32_t src_h)
421 intel_update_sprite_watermarks(plane, crtc, src_w, src_h, pixel_size,
423 src_w != crtc_w || src_h != crtc_h);
426 src_w
142 vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_i915_gem_object *obj, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t x, uint32_t y, uint32_t src_w, uint32_t src_h) argument
352 ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_i915_gem_object *obj, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t x, uint32_t y, uint32_t src_w, uint32_t src_h) argument
572 ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_i915_gem_object *obj, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t x, uint32_t y, uint32_t src_w, uint32_t src_h) argument
848 intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
888 uint32_t src_x, src_y, src_w, src_h; member in struct:__anon730
[all...]
H A Dintel_overlay.c431 short src_w; member in struct:put_image_params
741 tmp_width = packed_width_bytes(params->format, params->src_w);
743 tmp_width = params->src_w;
745 swidth = params->src_w;
755 swidth |= (params->src_w/uv_hscale) << 16;
757 params->src_w/uv_hscale);
759 params->src_w/uv_hscale);
1137 params->src_w = put_image_rec->src_width;
1142 params->src_scan_w > params->src_w) {
/drivers/gpu/drm/sti/
H A Dsti_layer.c74 int src_x, int src_y, int src_w, int src_h)
100 layer->src_w = src_w;
115 layer->src_w, layer->src_h, layer->src_x,
71 sti_layer_prepare(struct sti_layer *layer, struct drm_framebuffer *fb, struct drm_display_mode *mode, int mixer_id, int dest_x, int dest_y, int dest_w, int dest_h, int src_x, int src_y, int src_w, int src_h) argument
H A Dsti_layer.h79 * @src_w src_h: size of the input (fb) area
99 int src_w, src_h; member in struct:sti_layer
116 int src_w, int src_h);
H A Dsti_drm_plane.c30 uint32_t src_w, uint32_t src_h)
51 src_w >> 16, src_h >> 16);
26 sti_drm_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_plane.c45 uint32_t src_w, uint32_t src_h)
58 src_x, src_y, src_w, src_h);
219 uint32_t src_w, uint32_t src_h)
239 src_w = src_w >> 16;
243 fb->base.id, src_x, src_y, src_w, src_h,
249 nblks = request_smp_blocks(plane, fb->pixel_format, nplanes, src_w);
262 if (src_w != crtc_w) {
273 MDP5_PIPE_SRC_IMG_SIZE_WIDTH(src_w) |
277 MDP5_PIPE_SRC_SIZE_WIDTH(src_w) |
40 mdp5_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
214 mdp5_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
[all...]
H A Dmdp5_kms.h220 uint32_t src_w, uint32_t src_h);
/drivers/staging/imx-drm/
H A Dipuv3-plane.c96 uint32_t src_w, uint32_t src_h)
102 if (src_w != crtc_w || src_h != crtc_h)
110 src_w -= -crtc_x;
126 src_w = crtc_w;
176 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h);
270 uint32_t src_w, uint32_t src_h)
284 src_x >> 16, src_y >> 16, src_w >> 16, src_h >> 16);
91 ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
266 ipu_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
H A Dipuv3-plane.h42 uint32_t src_x, uint32_t src_y, uint32_t src_w,
/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c97 uint32_t src_w, uint32_t src_h)
113 src_w >>= 16;
116 format = ALIGN(src_w * 4, 0x100);
122 if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1))
125 if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3))
140 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w);
142 nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w);
347 uint32_t src_w, uint32_t src_h)
361 src_w >>= 16;
364 pitch = ALIGN(src_w *
93 nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
343 nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
[all...]
/drivers/gpu/drm/
H A Ddrm_rect.c131 int src_w = drm_rect_width(src); local
133 int hscale = drm_calc_scale(src_w, dst_w);
199 int src_w = drm_rect_width(src); local
201 int hscale = drm_calc_scale(src_w, dst_w);
207 int max_dst_w = src_w / min_hscale;
217 drm_rect_adjust_size(src, max_src_w - src_w, 0);
H A Ddrm_plane_helper.c161 * @src_w: width of source rectangle in @fb
189 uint32_t src_w, uint32_t src_h)
201 .x2 = src_x + src_w,
184 drm_primary_helper_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
/drivers/gpu/drm/omapdrm/
H A Domap_plane.c201 uint32_t src_w, uint32_t src_h,
215 win->src_w = src_w >> 16;
244 uint32_t src_w, uint32_t src_h)
253 swap(src_w, src_h);
259 src_x, src_y, src_w, src_h,
196 omap_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, void (*fxn)(void *), void *arg) argument
239 omap_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
H A Domap_drv.h50 uint32_t src_w, src_h; member in struct:omap_drm_window
170 uint32_t src_w, uint32_t src_h,
H A Domap_fb.c173 info->width = win->src_w;
180 uint32_t w = win->src_w;
/drivers/gpu/drm/shmobile/
H A Dshmob_drm_plane.c180 uint32_t src_w, uint32_t src_h)
193 if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) {
176 shmob_drm_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
/drivers/gpu/drm/armada/
H A Darmada_overlay.c104 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h)
125 * adjust src_x, src_y, src_w, src_h appropriately, and
137 val = (src_h & 0xffff0000) | src_w >> 16;
211 val = (src_h & 0xffff0000) | src_w >> 16;
101 armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
/drivers/gpu/drm/rcar-du/
H A Drcar_du_plane.c280 uint32_t src_w, uint32_t src_h)
295 if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) {
276 rcar_du_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument

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