Searched refs:INREG (Results 1 - 11 of 11) sorted by relevance

/drivers/video/fbdev/aty/
H A Dradeon_pm.c338 if ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13)
421 if (INREG(MEM_CNTL) & R300_MEM_USE_CD_CH_ONLY)
473 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) ||
475 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) {
491 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13))
502 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) {
558 return INREG( MC_IND_DATA);
573 rinfo->save_regs[9] = INREG(DISP_MISC_CNTL);
574 rinfo->save_regs[10] = INREG(DISP_PWR_MAN);
575 rinfo->save_regs[11] = INREG(LVDS_GEN_CNT
[all...]
H A Dradeon_accel.c29 local_base = INREG(MC_FB_LOCATION) << 16;
200 clock_cntl_index = INREG(CLOCK_CNTL_INDEX);
211 host_path_cntl = INREG(HOST_PATH_CNTL);
212 rbbm_soft_reset = INREG(RBBM_SOFT_RESET);
221 INREG(RBBM_SOFT_RESET);
223 tmp = INREG(RB2D_DSTCACHE_MODE);
234 INREG(RBBM_SOFT_RESET);
243 INREG(RBBM_SOFT_RESET);
247 INREG(HOST_PATH_CNTL);
268 OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MOD
[all...]
H A Dradeon_i2c.c23 val = INREG(chan->ddc_reg) & ~(VGA_DDC_CLK_OUT_EN);
28 (void)INREG(chan->ddc_reg);
37 val = INREG(chan->ddc_reg) & ~(VGA_DDC_DATA_OUT_EN);
42 (void)INREG(chan->ddc_reg);
51 val = INREG(chan->ddc_reg);
62 val = INREG(chan->ddc_reg);
156 (INREG(LVDS_GEN_CNTL) & LVDS_ON)) {
H A Dradeonfb.h392 #define INREG(addr) readl((rinfo->mmio_base)+addr) macro
402 tmp = INREG(addr);
433 (void)INREG(CLOCK_CNTL_DATA);
434 (void)INREG(CRTC_GEN_CNTL);
445 save = INREG(CLOCK_CNTL_INDEX);
448 tmp = INREG(CLOCK_CNTL_DATA);
459 data = INREG(CLOCK_CNTL_DATA);
540 if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
562 if (!(INREG(DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
578 if (((INREG(RBBM_STATU
[all...]
H A Dradeon_base.c310 temp = INREG(MPP_TB_CONFIG);
314 temp = INREG(MPP_TB_CONFIG);
478 if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) == 0)
484 if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) != 0)
488 if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) == 0)
504 hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8;
505 vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1);
882 tmp = INREG(LVDS_GEN_CNTL);
886 tmp = INREG(LVDS_GEN_CNTL);
894 tmp = INREG(CRTC_EXT_CNT
[all...]
H A Dradeon_monitor.c324 ulOrigCRTC_EXT_CNTL = INREG(CRTC_EXT_CNTL);
329 ulOrigDAC_EXT_CNTL = INREG(DAC_EXT_CNTL);
343 ulOrigDAC_CNTL = INREG(DAC_CNTL);
353 ulData = INREG(DAC_CNTL);
568 ((rinfo->bios_seg && (INREG(BIOS_4_SCRATCH) & 4))
569 || (INREG(LVDS_GEN_CNTL) & LVDS_ON))) {
851 u32 tmp = INREG(FP_HORZ_STRETCH) & HORZ_PANEL_SIZE;
853 tmp = INREG(FP_VERT_STRETCH) & VERT_PANEL_SIZE;
H A Dradeon_backlight.c72 lvds_gen_cntl = INREG(LVDS_GEN_CNTL);
/drivers/video/fbdev/intelfb/
H A Dintelfbhw.c284 if (INREG(LVDS) & PORT_ENABLE)
286 if (INREG(DVOA) & PORT_ENABLE)
288 if (INREG(DVOB) & PORT_ENABLE)
290 if (INREG(DVOC) & PORT_ENABLE)
425 tmp = INREG(DSPACNTR);
432 tmp = INREG(DSPABASE);
449 tmp = INREG(ADPA) & ~ADPA_DPMS_CONTROL_MASK;
529 hw->vga0_divisor = INREG(VGA0_DIVISOR);
530 hw->vga1_divisor = INREG(VGA1_DIVISOR);
531 hw->vga_pd = INREG(VGAP
[all...]
H A Dintelfb_i2c.c62 val = INREG(chan->reg);
73 val = INREG(chan->reg);
84 val = INREG(chan->reg);
96 val = INREG(chan->reg);
H A Dintelfbhw.h525 #define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr))) macro
553 head = INREG(PRI_RING_HEAD) & RING_HEAD_MASK; \
554 tail = INREG(PRI_RING_TAIL) & RING_TAIL_MASK; \
H A Dintelfbdrv.c1372 OUTREG(DPLL_A, INREG(DPLL_A) & ~DPLL_VCO_ENABLE);
1593 if (INREG(CURSOR_A_BASEADDR) != physical) {

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