Searched refs:INTR_MASK (Results 1 - 14 of 14) sorted by path

/drivers/block/
H A Dida_cmd.h41 #define INTR_MASK 0x0C macro
H A Dsmart1,2.h128 writel(val, h->vaddr + INTR_MASK);
164 outl(val, h->io_mem_addr + INTR_MASK);
/drivers/input/keyboard/
H A Dspear-keyboard.c32 #define INTR_MASK 0x54 macro
/drivers/net/ethernet/chelsio/cxgb3/
H A Dvsc8211.c71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ macro
100 INTR_MASK);
331 cause &= INTR_MASK;
/drivers/net/ethernet/qlogic/qlge/
H A Dqlge.h271 * Interrupt Mask Register (INTR_MASK) bit definitions.
812 INTR_MASK = 0x38, enumerator in enum:__anon3820
H A Dqlge_dbg.c1497 DUMP_REG(qdev, INTR_MASK);
H A Dqlge_main.c2523 (ql_read32(qdev, INTR_MASK) & INTR_MASK_PI)) {
2531 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
3766 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
H A Dqlge_mpi.c227 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
294 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
540 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
606 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
1243 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
1257 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
/drivers/usb/host/
H A Dehci-hcd.c105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
638 ehci_writel(ehci, INTR_MASK,
710 masked_status = status & (INTR_MASK | STS_FLR);
1128 int mask = INTR_MASK;
H A Dehci-hub.c358 mask = INTR_MASK;
503 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
H A Dfotg210-hcd.c92 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
5306 fotg210_writel(fotg210, INTR_MASK,
5372 masked_status = status & (INTR_MASK | STS_FLR);
H A Dfusbh200-hcd.c91 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
5225 fusbh200_writel(fusbh200, INTR_MASK,
5289 masked_status = status & (INTR_MASK | STS_FLR);
H A Doxu210hp-hcd.c2457 status &= INTR_MASK;
2761 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
3513 mask = INTR_MASK;
3600 writel(INTR_MASK, &oxu->regs->intr_enable);
H A Doxu210hp.h119 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro

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