Searched refs:addr (Results 1 - 25 of 3084) sorted by relevance

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/drivers/usb/musb/
H A Dmusb_io.h44 static inline u16 musb_readw(const void __iomem *addr, unsigned offset) argument
45 { return __raw_readw(addr + offset); }
47 static inline u32 musb_readl(const void __iomem *addr, unsigned offset) argument
48 { return __raw_readl(addr + offset); }
51 static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) argument
52 { __raw_writew(data, addr + offset); }
54 static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) argument
55 { __raw_writel(data, addr + offset); }
63 static inline u8 musb_readb(const void __iomem *addr, unsigned offset) argument
68 tmp = __raw_readw(addr
77 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument
92 musb_readb(const void __iomem *addr, unsigned offset) argument
95 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument
102 musb_readb(const void __iomem *addr, unsigned offset) argument
105 musb_readw(const void __iomem *addr, unsigned offset) argument
108 musb_readl(const void __iomem *addr, unsigned offset) argument
111 musb_writeb(void __iomem *addr, unsigned offset, u8 data) argument
114 musb_writew(void __iomem *addr, unsigned offset, u16 data) argument
117 musb_writel(void __iomem *addr, unsigned offset, u32 data) argument
[all...]
/drivers/gpu/drm/radeon/
H A Duvd_v4_2.c40 uint64_t addr; local
44 addr = rdev->uvd.gpu_addr >> 3;
46 WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
49 addr += size;
51 WREG32(UVD_VCPU_CACHE_OFFSET1, addr);
54 addr += size;
56 WREG32(UVD_VCPU_CACHE_OFFSET2, addr);
60 addr = (rdev->uvd.gpu_addr >> 28) & 0xF;
61 WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr <<
[all...]
H A Duvd_v3_1.c45 uint64_t addr = semaphore->gpu_addr; local
48 radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
51 radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
/drivers/net/wireless/ti/wl18xx/
H A Dio.c27 int wl18xx_top_reg_write(struct wl1271 *wl, int addr, u16 val) argument
32 if (WARN_ON(addr % 2))
35 if ((addr % 4) == 0) {
36 ret = wlcore_read32(wl, addr, &tmp);
41 ret = wlcore_write32(wl, addr, tmp);
43 ret = wlcore_read32(wl, addr - 2, &tmp);
48 ret = wlcore_write32(wl, addr - 2, tmp);
55 int wl18xx_top_reg_read(struct wl1271 *wl, int addr, u16 *out) argument
60 if (WARN_ON(addr % 2))
63 if ((addr
[all...]
H A Dio.h25 int __must_check wl18xx_top_reg_write(struct wl1271 *wl, int addr, u16 val);
26 int __must_check wl18xx_top_reg_read(struct wl1271 *wl, int addr, u16 *out);
/drivers/staging/rtl8192e/rtl8192e/
H A Drtl_eeprom.h29 u32 eprom_read(struct net_device *dev, u32 addr);
/drivers/media/pci/cx18/
H A Dcx18-io.h38 static inline u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr) argument
40 return __raw_readl(addr);
44 void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) argument
46 __raw_writel(val, addr);
49 static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr) argument
53 cx18_raw_writel_noretry(cx, val, addr);
54 if (val == cx18_raw_readl(cx, addr))
60 static inline u32 cx18_readl(struct cx18 *cx, const void __iomem *addr) argument
62 return readl(addr);
66 void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) argument
71 cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr) argument
82 cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr, u32 eval, u32 mask) argument
98 cx18_readw(struct cx18 *cx, const void __iomem *addr) argument
104 cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr) argument
109 cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr) argument
119 cx18_readb(struct cx18 *cx, const void __iomem *addr) argument
125 cx18_writeb_noretry(struct cx18 *cx, u8 val, void __iomem *addr) argument
130 cx18_writeb(struct cx18 *cx, u8 val, void __iomem *addr) argument
174 cx18_write_enc(struct cx18 *cx, u32 val, u32 addr) argument
179 cx18_read_enc(struct cx18 *cx, u32 addr) argument
[all...]
/drivers/s390/cio/
H A Dioasm.h28 static inline int stsch_err(struct subchannel_id schid, struct schib *addr) argument
39 : "+d" (ccode), "=m" (*addr)
40 : "d" (reg1), "a" (addr)
45 static inline int msch(struct subchannel_id schid, struct schib *addr) argument
55 : "d" (reg1), "a" (addr), "m" (*addr)
60 static inline int msch_err(struct subchannel_id schid, struct schib *addr) argument
72 : "d" (reg1), "a" (addr), "m" (*addr)
77 static inline int tsch(struct subchannel_id schid, struct irb *addr) argument
92 ssch(struct subchannel_id schid, union orb *addr) argument
124 tpi(struct tpi_info *addr) argument
[all...]
/drivers/staging/lustre/lustre/obdclass/
H A Ddebug.c59 int block_debug_setup(void *addr, int len, __u64 off, __u64 id) argument
61 LASSERT(addr);
65 memcpy(addr, (char *)&off, LPDS);
66 memcpy(addr + LPDS, (char *)&id, LPDS);
68 addr += len - LPDS - LPDS;
69 memcpy(addr, (char *)&off, LPDS);
70 memcpy(addr + LPDS, (char *)&id, LPDS);
76 int block_debug_check(char *who, void *addr, int end, __u64 off, __u64 id) argument
81 LASSERT(addr);
85 if (memcmp(addr, (cha
[all...]
/drivers/scsi/pm8001/
H A Dpm8001_chips.h49 static inline void pm8001_write_32(void *addr, u32 offset, __le32 val) argument
51 *((__le32 *)(addr + offset)) = val;
61 u32 addr, u32 val)
63 writel(val, pm8001_ha->io_mem[bar].memvirtaddr + addr);
65 static inline u32 pm8001_mr32(void __iomem *addr, u32 offset) argument
67 return readl(addr + offset);
69 static inline void pm8001_mw32(void __iomem *addr, u32 offset, u32 val) argument
71 writel(val, addr + offset);
60 pm8001_cw32(struct pm8001_hba_info *pm8001_ha, u32 bar, u32 addr, u32 val) argument
/drivers/net/wireless/rtl818x/rtl8180/
H A Drtl8225.h12 u8 addr, u8 data)
14 rtl8180_write_phy(dev, addr, data);
18 u8 addr, u8 data)
20 rtl8180_write_phy(dev, addr, data | 0x10000);
11 rtl8225_write_phy_ofdm(struct ieee80211_hw *dev, u8 addr, u8 data) argument
17 rtl8225_write_phy_cck(struct ieee80211_hw *dev, u8 addr, u8 data) argument
/drivers/net/wireless/ti/wl1251/
H A Dio.h37 static inline u32 wl1251_read32(struct wl1251 *wl, int addr) argument
39 wl->if_ops->read(wl, addr, &wl->buffer_32, sizeof(wl->buffer_32));
44 static inline void wl1251_write32(struct wl1251 *wl, int addr, u32 val) argument
47 wl->if_ops->write(wl, addr, &wl->buffer_32, sizeof(wl->buffer_32));
50 static inline u32 wl1251_read_elp(struct wl1251 *wl, int addr) argument
55 wl->if_ops->read_elp(wl, addr, &response);
57 wl->if_ops->read(wl, addr, &response, sizeof(u32));
62 static inline void wl1251_write_elp(struct wl1251 *wl, int addr, u32 val) argument
65 wl->if_ops->write_elp(wl, addr, val);
67 wl->if_ops->write(wl, addr,
[all...]
/drivers/video/fbdev/via/
H A Dvia_aux_ch7301.c31 static void probe(struct via_aux_bus *bus, u8 addr) argument
35 .addr = addr,
42 printk(KERN_INFO "viafb: Found %s at address 0x%x\n", name, addr);
H A Dvia_aux_vt1622.c31 static void probe(struct via_aux_bus *bus, u8 addr) argument
35 .addr = addr,
42 printk(KERN_INFO "viafb: Found %s at address 0x%x\n", name, addr);
H A Dvia_aux_vt1625.c31 static void probe(struct via_aux_bus *bus, u8 addr) argument
35 .addr = addr,
42 printk(KERN_INFO "viafb: Found %s at address 0x%x\n", name, addr);
/drivers/input/touchscreen/
H A Dcyttsp_i2c_common.c37 u16 addr, u8 length, void *values)
40 u8 client_addr = client->addr | ((addr >> 8) & 0x1);
41 u8 addr_lo = addr & 0xFF;
44 .addr = client_addr,
50 .addr = client_addr,
67 u16 addr, u8 length, const void *values)
70 u8 client_addr = client->addr | ((addr >> 8) & 0x1);
71 u8 addr_lo = addr
36 cyttsp_i2c_read_block_data(struct device *dev, u8 *xfer_buf, u16 addr, u8 length, void *values) argument
66 cyttsp_i2c_write_block_data(struct device *dev, u8 *xfer_buf, u16 addr, u8 length, const void *values) argument
[all...]
/drivers/gpu/drm/nouveau/core/subdev/fb/
H A Dnv46.c30 nv46_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch, argument
34 if (!(flags & 4)) tile->addr = (0 << 3);
35 else tile->addr = (1 << 3);
37 tile->addr |= 0x00000001; /* mode = vram */
38 tile->addr |= addr;
39 tile->limit = max(1u, addr + size) - 1;
/drivers/net/dsa/
H A Dmv88e6xxx.h49 int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
50 int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
51 int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
53 int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
55 int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
56 int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
57 int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
58 int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
60 int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
61 int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
[all...]
/drivers/net/wireless/ath/ath6kl/
H A Dbmi.h228 u32 addr; \
231 addr = ath6kl_get_hi_item_addr(ar, HI_ITEM(item)); \
233 ath6kl_bmi_write(ar, addr, (u8 *) &v, sizeof(v)); \
238 u32 addr, *check_type = val; \
243 addr = ath6kl_get_hi_item_addr(ar, HI_ITEM(item)); \
244 ret = ath6kl_bmi_read(ar, addr, (u8 *) &tmp, 4); \
257 int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len);
258 int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len);
260 u32 addr, u32 *param);
262 u32 addr);
[all...]
/drivers/infiniband/hw/ipath/
H A Dipath_dma.c64 u64 addr, size_t size,
76 u64 addr; local
81 addr = BAD_DMA_ADDRESS;
85 addr = (u64) page_address(page);
86 if (addr)
87 addr += offset;
91 return addr;
95 u64 addr, size_t size,
105 u64 addr; local
112 addr
63 ipath_dma_unmap_single(struct ib_device *dev, u64 addr, size_t size, enum dma_data_direction direction) argument
94 ipath_dma_unmap_page(struct ib_device *dev, u64 addr, size_t size, enum dma_data_direction direction) argument
133 ipath_sync_single_for_cpu(struct ib_device *dev, u64 addr, size_t size, enum dma_data_direction dir) argument
140 ipath_sync_single_for_device(struct ib_device *dev, u64 addr, size_t size, enum dma_data_direction dir) argument
151 void *addr = NULL; local
[all...]
/drivers/infiniband/hw/qib/
H A Dqib_dma.c60 static void qib_dma_unmap_single(struct ib_device *dev, u64 addr, size_t size, argument
70 u64 addr; local
75 addr = BAD_DMA_ADDRESS;
79 addr = (u64) page_address(page);
80 if (addr)
81 addr += offset;
85 return addr;
88 static void qib_dma_unmap_page(struct ib_device *dev, u64 addr, size_t size, argument
98 u64 addr; local
105 addr
126 qib_sync_single_for_cpu(struct ib_device *dev, u64 addr, size_t size, enum dma_data_direction dir) argument
131 qib_sync_single_for_device(struct ib_device *dev, u64 addr, size_t size, enum dma_data_direction dir) argument
141 void *addr = NULL; local
[all...]
/drivers/mtd/nand/
H A Datmel_nand_ecc.h114 #define pmecc_readl_relaxed(addr, reg) \
115 readl_relaxed((addr) + ATMEL_PMECC_##reg)
117 #define pmecc_writel(addr, reg, value) \
118 writel((value), (addr) + ATMEL_PMECC_##reg)
120 #define pmecc_readb_ecc_relaxed(addr, sector, n) \
121 readb_relaxed((addr) + ATMEL_PMECC_ECCx + ((sector) * 0x40) + (n))
123 #define pmecc_readl_rem_relaxed(addr, sector, n) \
124 readl_relaxed((addr) + ATMEL_PMECC_REMx + ((sector) * 0x40) + ((n) * 4))
126 #define pmerrloc_readl_relaxed(addr, reg) \
127 readl_relaxed((addr)
[all...]
/drivers/hwmon/
H A Dsch56xx-common.h24 int sch56xx_read_virtual_reg(u16 addr, u16 reg);
25 int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val);
26 int sch56xx_read_virtual_reg16(u16 addr, u16 reg);
27 int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,
31 u16 addr, u32 revision, struct mutex *io_lock, int check_enabled);
/drivers/staging/rtl8723au/include/
H A Dusb_ops_linux.h24 int rtl8723au_read_port(struct rtw_adapter *adapter, u32 addr, u32 cnt,
27 int rtl8723au_write_port(struct rtw_adapter *padapter, u32 addr, u32 cnt,
30 int rtl8723au_read_interrupt(struct rtw_adapter *adapter, u32 addr);
32 u8 rtl8723au_read8(struct rtw_adapter *padapter, u16 addr);
33 u16 rtl8723au_read16(struct rtw_adapter *padapter, u16 addr);
34 u32 rtl8723au_read32(struct rtw_adapter *padapter, u16 addr);
35 int rtl8723au_write8(struct rtw_adapter *padapter, u16 addr, u8 val);
36 int rtl8723au_write16(struct rtw_adapter *padapter, u16 addr, u16 val);
37 int rtl8723au_write32(struct rtw_adapter *padapter, u16 addr, u32 val);
39 u16 addr, u1
[all...]
/drivers/media/dvb-frontends/drx39xyj/
H A Ddrx_dap_fasi.h37 * Fast access, because of short addressing format (16 instead of 32 bits addr)
168 * | 7b i2c addr | 10b i2c addr |
248 #define DRXDAP_FASI_ADDR2BLOCK(addr) (((addr)>>22)&0x3F)
249 #define DRXDAP_FASI_ADDR2BANK(addr) (((addr)>>16)&0x3F)
250 #define DRXDAP_FASI_ADDR2OFFSET(addr) ((addr)&0x7FFF)
252 #define DRXDAP_FASI_SHORT_FORMAT(addr) (((add
[all...]

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