Searched refs:ah (Results 1 - 25 of 166) sorted by relevance

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/drivers/net/wireless/ath/ath5k/
H A Drfkill.c39 static inline void ath5k_rfkill_disable(struct ath5k_hw *ah) argument
41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
48 static inline void ath5k_rfkill_enable(struct ath5k_hw *ah) argument
56 ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable) argument
67 ath5k_is_rfkill_set(struct ath5k_hw *ah) argument
78 struct ath5k_hw *ah = (void *)data; local
87 ath5k_rfkill_hw_start(struct ath5k_hw *ah) argument
105 ath5k_rfkill_hw_stop(struct ath5k_hw *ah) argument
[all...]
H A Dattach.c33 * @ah: The &struct ath5k_hw
35 static int ath5k_hw_post(struct ath5k_hw *ah) argument
54 init_val = ath5k_hw_reg_read(ah, cur_reg);
58 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
59 cur_val = ath5k_hw_reg_read(ah, cur_reg);
62 ATH5K_ERR(ah, "POST Failed !!!\n");
68 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
73 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
74 cur_val = ath5k_hw_reg_read(ah, cur_reg);
77 ATH5K_ERR(ah, "POS
104 ath5k_hw_init(struct ath5k_hw *ah) argument
350 ath5k_hw_deinit(struct ath5k_hw *ah) argument
[all...]
H A Dani.c62 * @ah: The &struct ath5k_hw
66 ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) argument
86 ATH5K_ERR(ah, "noise immunity level %d out of range",
91 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_DESIRED_SIZE,
93 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE,
95 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_AGCCOARSE,
97 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
100 ah->ani_state.noise_imm_level = level;
101 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
106 * @ah
111 ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) argument
135 ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) argument
157 ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) argument
197 ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on) argument
223 ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, bool ofdm_trigger) argument
310 ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
374 ath5k_hw_ani_get_listen_time(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
406 ath5k_ani_save_and_clear_phy_errors(struct ath5k_hw *ah, struct ath5k_ani_state *as) argument
475 ath5k_ani_calibration(struct ath5k_hw *ah) argument
539 ath5k_ani_mib_intr(struct ath5k_hw *ah) argument
576 ath5k_ani_phy_error_report(struct ath5k_hw *ah, enum ath5k_phy_error_code phyerr) argument
604 ath5k_enable_phy_err_counters(struct ath5k_hw *ah) argument
625 ath5k_disable_phy_err_counters(struct ath5k_hw *ah) argument
645 ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode) argument
730 ath5k_ani_print_counters(struct ath5k_hw *ah) argument
[all...]
H A Dpcu.c79 * ah->ah_ack_bitrate_high to true else base rate is
103 * @ah: The &struct ath5k_hw
113 ath5k_hw_get_frame_duration(struct ath5k_hw *ah, enum ieee80211_band band, argument
121 if (!ah->ah_bwmode) {
122 __le16 raw_dur = ieee80211_generic_frame_duration(ah->hw,
138 switch (ah->ah_bwmode) {
172 * @ah: The &struct ath5k_hw
175 ath5k_hw_get_default_slottime(struct ath5k_hw *ah) argument
177 struct ieee80211_channel *channel = ah->ah_current_channel;
180 switch (ah
206 ath5k_hw_get_default_sifs(struct ath5k_hw *ah) argument
243 ath5k_hw_update_mib_counters(struct ath5k_hw *ah) argument
277 ath5k_hw_write_rate_duration(struct ath5k_hw *ah) argument
327 ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) argument
345 ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) argument
370 ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac) argument
398 ath5k_hw_set_bssid(struct ath5k_hw *ah) argument
447 ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask) argument
465 ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1) argument
482 ath5k_hw_get_rx_filter(struct ath5k_hw *ah) argument
511 ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter) argument
561 ath5k_hw_get_tsf64(struct ath5k_hw *ah) argument
608 ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64) argument
621 ath5k_hw_reset_tsf(struct ath5k_hw *ah) argument
647 ath5k_hw_init_beacon_timers(struct ath5k_hw *ah, u32 next_beacon, u32 interval) argument
795 ath5k_hw_check_beacon_timers(struct ath5k_hw *ah, int intval) argument
822 ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class) argument
850 ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) argument
862 ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah) argument
875 ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode) argument
952 ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode) argument
[all...]
H A Dqcu.c59 * @ah: The &struct ath5k_hw
63 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) argument
66 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
69 if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)
73 if (ah->ah_version == AR5K_AR5210)
76 pending = ath5k_hw_reg_read(ah, AR5K_QUEUE_STATUS(queue));
82 if (!pending && AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
90 * @ah: The &struct ath5k_hw
94 ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
96 if (WARN_ON(queue >= ah
138 ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, struct ath5k_txq_info *queue_info) argument
154 ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, const struct ath5k_txq_info *qinfo) argument
203 ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, struct ath5k_txq_info *queue_info) argument
287 ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, unsigned int queue) argument
330 ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
565 ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) argument
696 ath5k_hw_init_queues(struct ath5k_hw *ah) argument
[all...]
H A Ddma.c45 * @ah: The &struct ath5k_hw
48 ath5k_hw_start_rx_dma(struct ath5k_hw *ah) argument
50 ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR);
51 ath5k_hw_reg_read(ah, AR5K_CR);
56 * @ah: The &struct ath5k_hw
59 ath5k_hw_stop_rx_dma(struct ath5k_hw *ah) argument
63 ath5k_hw_reg_write(ah, AR5K_CR_RXD, AR5K_CR);
69 (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) != 0;
74 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
82 * @ah
85 ath5k_hw_get_rxdp(struct ath5k_hw *ah) argument
98 ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) argument
130 ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue) argument
188 ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) argument
328 ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue) argument
353 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue) argument
396 ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr) argument
453 ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase) argument
506 ath5k_hw_is_intr_pending(struct ath5k_hw *ah) argument
527 ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) argument
755 ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask) argument
856 ath5k_hw_dma_init(struct ath5k_hw *ah) argument
896 ath5k_hw_dma_stop(struct ath5k_hw *ah) argument
[all...]
H A Dbase.c97 static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
187 static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp) argument
189 u64 tsf = ath5k_hw_get_tsf64(ah);
220 struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv; local
221 return ath5k_hw_reg_read(ah, reg_offset);
226 struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv; local
227 ath5k_hw_reg_write(ah, val, reg_offset);
243 struct ath5k_hw *ah = hw->priv; local
244 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
282 ath5k_setup_channels(struct ath5k_hw *ah, struc argument
330 ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b) argument
347 struct ath5k_hw *ah = hw->priv; local
433 ath5k_chan_set(struct ath5k_hw *ah, struct cfg80211_chan_def *chandef) argument
505 ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah, struct ieee80211_vif *vif) argument
562 ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix) argument
583 ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr) argument
615 ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
718 ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf, struct ath5k_txq *txq, int padsize, struct ieee80211_tx_control *control) argument
840 ath5k_desc_alloc(struct ath5k_hw *ah) argument
905 ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
919 ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
935 ath5k_desc_free(struct ath5k_hw *ah) argument
961 ath5k_txq_setup(struct ath5k_hw *ah, int qtype, int subtype) argument
1013 ath5k_beaconq_setup(struct ath5k_hw *ah) argument
1029 ath5k_beaconq_config(struct ath5k_hw *ah) argument
1097 ath5k_drain_tx_buffs(struct ath5k_hw *ah) argument
1126 ath5k_txq_release(struct ath5k_hw *ah) argument
1147 ath5k_rx_start(struct ath5k_hw *ah) argument
1188 ath5k_rx_stop(struct ath5k_hw *ah) argument
1198 ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_rx_status *rs) argument
1227 ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb, struct ieee80211_rx_status *rxs) argument
1358 ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_rx_status *rs) argument
1435 ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs) argument
1507 ath5k_set_current_imask(struct ath5k_hw *ah) argument
1528 struct ath5k_hw *ah = (void *)data; local
1597 struct ath5k_hw *ah = hw->priv; local
1650 ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb, struct ath5k_txq *txq, struct ath5k_tx_status *ts, struct ath5k_buf *bf) argument
1716 ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq) argument
1774 struct ath5k_hw *ah = (void *)data; local
1793 ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf) argument
1879 struct ath5k_hw *ah = hw->priv; local
1912 ath5k_beacon_send(struct ath5k_hw *ah) argument
2030 ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf) argument
2132 ath5k_beacon_config(struct ath5k_hw *ah) argument
2166 struct ath5k_hw *ah = (struct ath5k_hw *) data; local
2199 ath5k_intr_calibration_poll(struct ath5k_hw *ah) argument
2232 ath5k_schedule_rx(struct ath5k_hw *ah) argument
2239 ath5k_schedule_tx(struct ath5k_hw *ah) argument
2248 struct ath5k_hw *ah = dev_id; local
2391 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2437 struct ath5k_hw *ah = (void *)data; local
2448 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2514 ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops) argument
2670 ath5k_stop_locked(struct ath5k_hw *ah) argument
2708 struct ath5k_hw *ah = hw->priv; local
2773 ath5k_stop_tasklets(struct ath5k_hw *ah) argument
2791 struct ath5k_hw *ah = hw->priv; local
2842 ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan, bool skip_pcu) argument
2935 struct ath5k_hw *ah = container_of(work, struct ath5k_hw, local
2947 struct ath5k_hw *ah = hw->priv; local
3086 ath5k_deinit_ah(struct ath5k_hw *ah) argument
3120 ath5k_any_vif_assoc(struct ath5k_hw *ah) argument
3137 struct ath5k_hw *ah = hw->priv; local
3148 _ath5k_printk(const struct ath5k_hw *ah, const char *level, const char *fmt, ...) argument
[all...]
H A Dreset.c53 * @ah: The &struct ath5k_hw
67 ath5k_hw_register_timeout(struct ath5k_hw *ah, u32 reg, u32 flag, u32 val, argument
74 data = ath5k_hw_reg_read(ah, reg);
92 * @ah: The &struct ath5k_hw
101 ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec) argument
103 struct ath_common *common = ath5k_hw_common(ah);
109 * @ah: The &struct ath5k_hw
118 ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) argument
120 struct ath_common *common = ath5k_hw_common(ah);
126 * @ah
132 ath5k_hw_init_core_clock(struct ath5k_hw *ah) argument
281 ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable) argument
397 ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val) argument
446 ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags) argument
514 ath5k_hw_set_power_mode(struct ath5k_hw *ah, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration) argument
607 ath5k_hw_on_hold(struct ath5k_hw *ah) argument
669 ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
848 ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
976 ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel) argument
1146 ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, struct ieee80211_channel *channel, bool fast, bool skip_pcu) argument
[all...]
H A Dled.c90 void ath5k_led_enable(struct ath5k_hw *ah) argument
92 if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
93 ath5k_hw_set_gpio_output(ah, ah->led_pin);
94 ath5k_led_off(ah);
98 static void ath5k_led_on(struct ath5k_hw *ah) argument
100 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
102 ath5k_hw_set_gpio(ah, ah->led_pin, ah
105 ath5k_led_off(struct ath5k_hw *ah) argument
126 ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led, const char *name, char *trigger) argument
156 ath5k_unregister_leds(struct ath5k_hw *ah) argument
162 ath5k_init_leds(struct ath5k_hw *ah) argument
[all...]
H A Dani.h104 void ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode);
105 void ath5k_ani_mib_intr(struct ath5k_hw *ah);
106 void ath5k_ani_calibration(struct ath5k_hw *ah);
107 void ath5k_ani_phy_error_report(struct ath5k_hw *ah,
111 void ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level);
112 void ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level);
113 void ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level);
114 void ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on);
115 void ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on);
117 void ath5k_ani_print_counters(struct ath5k_hw *ah);
[all...]
/drivers/net/wireless/ath/ath9k/
H A Dhw-ops.h24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, argument
27 if (!ah->aspm_enabled)
30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
33 static inline void ath9k_hw_rxena(struct ath_hw *ah) argument
35 ath9k_hw_ops(ah)->rx_enable(ah);
38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, argument
41 ath9k_hw_ops(ah)->set_desc_link(ds, link);
44 static inline bool ath9k_hw_calibrate(struct ath_hw *ah, argument
52 ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked, u32 *sync_cause_p) argument
58 ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i) argument
64 ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, struct ath_tx_status *ts) argument
70 ath9k_hw_get_duration(struct ath_hw *ah, const void *ds, int index) argument
76 ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
82 ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
88 ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum) argument
93 ath9k_hw_tx99_stop(struct ath_hw *ah) argument
98 ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power) argument
106 ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) argument
116 ath9k_hw_init_hang_checks(struct ath_hw *ah) argument
121 ath9k_hw_detect_mac_hang(struct ath_hw *ah) argument
126 ath9k_hw_detect_bb_hang(struct ath_hw *ah) argument
133 ath9k_hw_rf_set_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
139 ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
145 ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) argument
155 ath9k_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
161 ath9k_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
167 ath9k_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
173 ath9k_olc_init(struct ath_hw *ah) argument
181 ath9k_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
187 ath9k_hw_mark_phy_inactive(struct ath_hw *ah) argument
192 ath9k_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
198 ath9k_hw_rfbus_req(struct ath_hw *ah) argument
203 ath9k_hw_rfbus_done(struct ath_hw *ah) argument
208 ath9k_hw_restore_chainmask(struct ath_hw *ah) argument
216 ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
222 ath9k_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
228 ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
234 ath9k_hw_setup_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal) argument
240 ath9k_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
248 ath9k_hw_set_radar_params(struct ath_hw *ah) argument
256 ath9k_hw_init_cal_settings(struct ath_hw *ah) argument
261 ath9k_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
267 ath9k_hw_init_mode_gain_regs(struct ath_hw *ah) argument
275 ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
[all...]
H A Dar9003_rtt.h20 void ar9003_hw_rtt_enable(struct ath_hw *ah);
21 void ar9003_hw_rtt_disable(struct ath_hw *ah);
22 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);
23 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah);
24 void ar9003_hw_rtt_load_hist(struct ath_hw *ah);
25 void ar9003_hw_rtt_fill_hist(struct ath_hw *ah);
26 void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);
27 bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan);
H A Dar9003_hw.c40 static void ar9003_hw_init_mode_regs(struct ath_hw *ah) argument
42 if (AR_SREV_9330_11(ah)) {
44 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
46 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
50 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
52 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
56 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
60 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
62 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
66 INIT_INI_ARRAY(&ah
504 ar9003_tx_gain_table_mode0(struct ath_hw *ah) argument
544 ar9003_tx_gain_table_mode1(struct ath_hw *ah) argument
588 ar9003_tx_gain_table_mode2(struct ath_hw *ah) argument
616 ar9003_tx_gain_table_mode3(struct ath_hw *ah) argument
649 ar9003_tx_gain_table_mode4(struct ath_hw *ah) argument
668 ar9003_tx_gain_table_mode5(struct ath_hw *ah) argument
684 ar9003_tx_gain_table_mode6(struct ath_hw *ah) argument
697 ar9003_tx_gain_table_mode7(struct ath_hw *ah) argument
706 ar9003_tx_gain_table_apply(struct ath_hw *ah) argument
726 ar9003_rx_gain_table_mode0(struct ath_hw *ah) argument
770 ar9003_rx_gain_table_mode1(struct ath_hw *ah) argument
814 ar9003_rx_gain_table_mode2(struct ath_hw *ah) argument
837 ar9003_rx_gain_table_mode3(struct ath_hw *ah) argument
852 ar9003_rx_gain_table_apply(struct ath_hw *ah) argument
872 ar9003_hw_init_mode_gain_regs(struct ath_hw *ah) argument
887 ar9003_hw_configpcipowersave(struct ath_hw *ah, bool power_off) argument
928 ar9003_hw_init_hang_checks(struct ath_hw *ah) argument
973 ath9k_hw_verify_hang(struct ath_hw *ah, unsigned int queue) argument
1000 ar9003_hw_detect_mac_hang(struct ath_hw *ah) argument
1040 ar9003_hw_attach_ops(struct ath_hw *ah) argument
[all...]
H A Dar9002_hw.c26 static int ar9002_hw_init_mode_regs(struct ath_hw *ah) argument
28 if (AR_SREV_9271(ah)) {
29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
35 INIT_INI_ARRAY(&ah->iniPcieSerdes,
38 if (AR_SREV_9287_11_OR_LATER(ah)) {
39 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
40 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
41 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
107 ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah) argument
130 ar9280_20_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) argument
146 ar9271_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) argument
156 ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) argument
204 ar9002_hw_configpcipowersave(struct ath_hw *ah, bool power_off) argument
326 ar9002_hw_get_radiorev(struct ath_hw *ah) argument
345 ar9002_hw_rf_claim(struct ath_hw *ah) argument
373 ar9002_hw_enable_async_fifo(struct ath_hw *ah) argument
386 ar9002_hw_init_hang_checks(struct ath_hw *ah) argument
401 ar9002_hw_attach_ops(struct ath_hw *ah) argument
428 ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dhw.c31 static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
38 static void ath9k_hw_set_clockrate(struct ath_hw *ah) argument
40 struct ath_common *common = ath9k_hw_common(ah);
41 struct ath9k_channel *chan = ah->curchan;
45 if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah))
51 else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
68 static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) argument
70 struct ath_common *common = ath9k_hw_common(ah);
75 bool ath9k_hw_wait(struct ath_hw *ah, u3 argument
96 ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan, int hw_delay) argument
109 ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array, int column, unsigned int *writecnt) argument
135 ath9k_hw_computetxtime(struct ath_hw *ah, u8 phy, int kbps, u32 frameLen, u16 rateix, bool shortPreamble) argument
188 ath9k_hw_get_channel_centers(struct ath_hw *ah, struct ath9k_channel *chan, struct chan_centers *centers) argument
221 ath9k_hw_read_revisions(struct ath_hw *ah) argument
278 ath9k_hw_disablepcie(struct ath_hw *ah) argument
297 ath9k_hw_chip_test(struct ath_hw *ah) argument
347 ath9k_hw_init_config(struct ath_hw *ah) argument
404 ath9k_hw_init_defaults(struct ath_hw *ah) argument
434 ath9k_hw_init_macaddr(struct ath_hw *ah) argument
455 ath9k_hw_post_init(struct ath_hw *ah) argument
496 ath9k_hw_attach_ops(struct ath_hw *ah) argument
506 __ath9k_hw_init(struct ath_hw *ah) argument
603 ath9k_hw_init(struct ath_hw *ah) argument
653 ath9k_hw_init_qos(struct ath_hw *ah) argument
674 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah) argument
699 ath9k_hw_init_pll(struct ath_hw *ah, struct ath9k_channel *chan) argument
866 ath9k_hw_init_interrupt_masks(struct ath_hw *ah, enum nl80211_iftype opmode) argument
920 ath9k_hw_set_sifs_time(struct ath_hw *ah, u32 us) argument
927 ath9k_hw_setslottime(struct ath_hw *ah, u32 us) argument
934 ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us) argument
941 ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us) argument
948 ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu) argument
962 ath9k_hw_init_global_settings(struct ath_hw *ah) argument
1070 ath9k_hw_deinit(struct ath_hw *ah) argument
1101 ath9k_hw_set_dma(struct ath_hw *ah) argument
1175 ath9k_hw_set_operating_mode(struct ath_hw *ah, int opmode) argument
1203 ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled, u32 *coef_mantissa, u32 *coef_exponent) argument
1225 ath9k_hw_ar9330_reset_war(struct ath_hw *ah, int type) argument
1256 ath9k_hw_set_reset(struct ath_hw *ah, int type) argument
1339 ath9k_hw_set_reset_power_on(struct ath_hw *ah) argument
1377 ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type) argument
1409 ath9k_hw_chip_reset(struct ath_hw *ah, struct ath9k_channel *chan) argument
1438 ath9k_hw_channel_change(struct ath_hw *ah, struct ath9k_channel *chan) argument
1508 ath9k_hw_apply_gpio_override(struct ath_hw *ah) argument
1522 ath9k_hw_check_nav(struct ath_hw *ah) argument
1535 ath9k_hw_check_alive(struct ath_hw *ah) argument
1571 ath9k_hw_init_mfp(struct ath_hw *ah) argument
1592 ath9k_hw_reset_opmode(struct ath_hw *ah, u32 macStaId1, u32 saveDefAntenna) argument
1614 ath9k_hw_init_queues(struct ath_hw *ah) argument
1633 ath9k_hw_init_desc(struct ath_hw *ah) argument
1671 ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan) argument
1751 ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_hw_cal_data *caldata, bool fastcc) argument
1975 ath9k_set_power_sleep(struct ath_hw *ah) argument
2016 ath9k_set_power_network_sleep(struct ath_hw *ah) argument
2055 ath9k_hw_set_power_awake(struct ath_hw *ah) argument
2108 ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode) argument
2162 ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period) argument
2199 ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, const struct ath9k_beacon_state *bs) argument
2293 ath9k_hw_dfs_tested(struct ath_hw *ah) argument
2307 ath9k_hw_fill_cap_info(struct ath_hw *ah) argument
2519 ath9k_hw_gpio_cfg_output_mux(struct ath_hw *ah, u32 gpio, u32 type) argument
2547 ath9k_hw_cfg_gpio_input(struct ath_hw *ah, u32 gpio) argument
2569 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio) argument
2597 ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio, u32 ah_signal_type) argument
2619 ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val) argument
2636 ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna) argument
2646 ath9k_hw_getrxfilter(struct ath_hw *ah) argument
2660 ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits) argument
2687 ath9k_hw_phy_disable(struct ath_hw *ah) argument
2701 ath9k_hw_disable(struct ath_hw *ah) argument
2714 get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan) argument
2726 ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan, bool test) argument
2751 ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test) argument
2768 ath9k_hw_setopmode(struct ath_hw *ah) argument
2774 ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1) argument
2781 ath9k_hw_write_associd(struct ath_hw *ah) argument
2793 ath9k_hw_gettsf64(struct ath_hw *ah) argument
2813 ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64) argument
2820 ath9k_hw_reset_tsf(struct ath_hw *ah) argument
2831 ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set) argument
2840 ath9k_hw_set11nmac2040(struct ath_hw *ah, struct ath9k_channel *chan) argument
2883 ath9k_hw_gettsf32(struct ath_hw *ah) argument
2889 ath_gen_timer_alloc(struct ath_hw *ah, void (*trigger)(void *), void (*overflow)(void *), void *arg, u8 timer_index) argument
2917 ath9k_hw_gen_timer_start(struct ath_hw *ah, struct ath_gen_timer *timer, u32 timer_next, u32 timer_period) argument
2967 ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) argument
2999 ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer) argument
3012 ath_gen_timer_isr(struct ath_hw *ah) argument
3120 ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len) argument
[all...]
H A Dar9002_calib.c29 static bool ar9002_hw_is_cal_supported(struct ath_hw *ah, argument
34 switch (ah->supp_cals & cal_type) {
41 if (!((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
49 static void ar9002_hw_setup_calibration(struct ath_hw *ah, argument
52 struct ath_common *common = ath9k_hw_common(ah);
54 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
60 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
65 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
69 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
74 REG_SET_BIT(ah, AR_PHY_TIMING_CTRL
78 ar9002_hw_per_calibration(struct ath_hw *ah, struct ath9k_channel *ichan, u8 rxchainmask, struct ath9k_cal_list *currCal) argument
116 ar9002_hw_iqcal_collect(struct ath_hw *ah) argument
135 ar9002_hw_adc_gaincal_collect(struct ath_hw *ah) argument
159 ar9002_hw_adc_dccal_collect(struct ath_hw *ah) argument
183 ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) argument
260 ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains) argument
314 ar9002_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains) argument
368 ar9287_hw_olc_temp_compensation(struct ath_hw *ah) argument
398 ar9280_hw_olc_temp_compensation(struct ath_hw *ah) argument
428 ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
533 ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
637 ar9002_hw_pa_cal(struct ath_hw *ah, bool is_reset) argument
652 ar9002_hw_olc_temp_compensation(struct ath_hw *ah) argument
660 ar9002_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, u8 rxchainmask, bool longcal) argument
716 ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
758 ar9285_hw_clc(struct ath_hw *ah, struct ath9k_channel *chan) argument
814 ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
950 ar9002_hw_init_cal_settings(struct ath_hw *ah) argument
979 ar9002_hw_attach_calib_ops(struct ath_hw *ah) argument
[all...]
H A Dani.c107 static void ath9k_hw_update_mibstats(struct ath_hw *ah, argument
110 stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);
111 stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);
112 stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);
113 stats->rts_good += REG_READ(ah, AR_RTS_OK);
114 stats->beacons += REG_READ(ah, AR_BEACON_CNT);
117 static void ath9k_ani_restart(struct ath_hw *ah) argument
121 if (!ah->curchan)
124 aniState = &ah->ani;
127 ENABLE_REGWRITE_BUFFER(ah);
143 ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel, bool scan) argument
212 ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) argument
228 ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel, bool scan) argument
271 ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah) argument
289 ath9k_hw_ani_lower_immunity(struct ath_hw *ah) argument
314 ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) argument
374 ath9k_hw_ani_read_counters(struct ath_hw *ah) argument
406 ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) argument
448 ath9k_enable_mib_counters(struct ath_hw *ah) argument
470 ath9k_hw_disable_mib_counters(struct ath_hw *ah) argument
484 ath9k_hw_ani_init(struct ath_hw *ah) argument
[all...]
H A Dcommon-beacon.h19 int ath9k_cmn_beacon_config_sta(struct ath_hw *ah,
22 void ath9k_cmn_beacon_config_adhoc(struct ath_hw *ah,
24 void ath9k_cmn_beacon_config_ap(struct ath_hw *ah,
H A Dar9003_rtt.c38 void ar9003_hw_rtt_enable(struct ath_hw *ah) argument
40 REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
43 void ar9003_hw_rtt_disable(struct ath_hw *ah) argument
45 REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
48 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask) argument
50 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
54 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah) argument
56 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
61 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
64 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTR
72 ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain, u32 index, u32 data28) argument
104 ar9003_hw_rtt_load_hist(struct ath_hw *ah) argument
121 ar9003_hw_patch_rtt(struct ath_hw *ah, int index, int chain) argument
142 ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index) argument
169 ar9003_hw_rtt_fill_hist(struct ath_hw *ah) argument
191 ar9003_hw_rtt_clear_hist(struct ath_hw *ah) argument
206 ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dar9003_phy.c45 * @ah: atheros hardware structure
68 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
75 ath9k_hw_get_channel_centers(ah, chan, &centers);
79 if (AR_SREV_9330(ah)) {
80 if (ah->is_clk_25mhz)
88 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
98 } else if (AR_SREV_9340(ah)) {
99 if (ah->is_clk_25mhz) {
106 } else if (AR_SREV_9550(ah) || AR_SREV_953
173 ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, struct ath9k_channel *chan) argument
261 ar9003_hw_spur_ofdm_clear(struct ath_hw *ah) argument
304 ar9003_hw_spur_ofdm(struct ath_hw *ah, int freq_offset, int spur_freq_sd, int spur_delta_phase, int spur_subchannel_sd, int range, int synth_freq) argument
371 ar9003_hw_spur_ofdm_9565(struct ath_hw *ah, int freq_offset) argument
404 ar9003_hw_spur_ofdm_work(struct ath_hw *ah, struct ath9k_channel *chan, int freq_offset, int range, int synth_freq) argument
455 ar9003_hw_spur_mitigate_ofdm(struct ath_hw *ah, struct ath9k_channel *chan) argument
512 ar9003_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
520 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah, struct ath9k_channel *chan) argument
537 ar9003_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
554 ar9003_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
592 ar9003_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
609 ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) argument
627 ar9003_hw_override_ini(struct ath_hw *ah) argument
682 ar9003_hw_prog_ini(struct ath_hw *ah, struct ar5416IniArray *iniArr, int column) argument
710 ar9550_hw_get_modes_txgain_index(struct ath_hw *ah, struct ath9k_channel *chan) argument
735 ar9003_doubler_fix(struct ath_hw *ah) argument
783 ar9003_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
886 ar9003_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
909 ar9003_hw_mark_phy_inactive(struct ath_hw *ah) argument
914 ar9003_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
961 ar9003_hw_rfbus_req(struct ath_hw *ah) argument
972 ar9003_hw_rfbus_done(struct ath_hw *ah) argument
981 ar9003_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param) argument
1255 ar9003_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) argument
1283 ar9003_hw_set_nf_limits(struct ath_hw *ah) argument
1308 ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah) argument
1360 ar9003_hw_set_radar_params(struct ath_hw *ah, struct ath_hw_radar_conf *conf) argument
1397 ar9003_hw_set_radar_conf(struct ath_hw *ah) argument
1411 ar9003_hw_antdiv_comb_conf_get(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
1443 ar9003_hw_antdiv_comb_conf_set(struct ath_hw *ah, struct ath_hw_antcomb_conf *antconf) argument
1470 ar9003_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable) argument
1580 ar9003_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
1646 ar9003_hw_spectral_scan_config(struct ath_hw *ah, struct ath_spec_scan *param) argument
1687 ar9003_hw_spectral_scan_trigger(struct ath_hw *ah) argument
1694 ar9003_hw_spectral_scan_wait(struct ath_hw *ah) argument
1707 ar9003_hw_tx99_start(struct ath_hw *ah, u32 qnum) argument
1722 ar9003_hw_tx99_stop(struct ath_hw *ah) argument
1728 ar9003_hw_tx99_set_txpower(struct ath_hw *ah, u8 txpower) argument
1799 ar9003_hw_attach_phy_ops(struct ath_hw *ah) argument
1877 ar9003_hw_bb_watchdog_check(struct ath_hw *ah) argument
1914 ar9003_hw_bb_watchdog_config(struct ath_hw *ah) argument
1973 ar9003_hw_bb_watchdog_read(struct ath_hw *ah) argument
1989 ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) argument
2028 ar9003_hw_disable_phy_restart(struct ath_hw *ah) argument
[all...]
H A Dcommon-init.h18 void ath9k_cmn_setup_ht_cap(struct ath_hw *ah,
20 void ath9k_cmn_reload_chainmask(struct ath_hw *ah);
H A Dar9003_mci.c23 static void ar9003_mci_reset_req_wakeup(struct ath_hw *ah) argument
25 REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
28 REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
32 static int ar9003_mci_wait_for_interrupt(struct ath_hw *ah, u32 address, argument
35 struct ath_common *common = ath9k_hw_common(ah);
38 if (!(REG_READ(ah, address) & bit_position)) {
47 REG_WRITE(ah, address, bit_position);
53 ar9003_mci_reset_req_wakeup(ah);
57 REG_WRITE(ah, AR_MCI_INTERRUPT_RAW,
60 REG_WRITE(ah, AR_MCI_INTERRUPT_RA
78 ar9003_mci_remote_reset(struct ath_hw *ah, bool wait_done) argument
87 ar9003_mci_send_lna_transfer(struct ath_hw *ah, bool wait_done) argument
95 ar9003_mci_send_req_wake(struct ath_hw *ah, bool wait_done) argument
102 ar9003_mci_send_sys_waking(struct ath_hw *ah, bool wait_done) argument
108 ar9003_mci_send_lna_take(struct ath_hw *ah, bool wait_done) argument
116 ar9003_mci_send_sys_sleeping(struct ath_hw *ah, bool wait_done) argument
123 ar9003_mci_send_coex_version_query(struct ath_hw *ah, bool wait_done) argument
138 ar9003_mci_send_coex_version_response(struct ath_hw *ah, bool wait_done) argument
153 ar9003_mci_send_coex_wlan_channels(struct ath_hw *ah, bool wait_done) argument
169 ar9003_mci_send_coex_bt_status_query(struct ath_hw *ah, bool wait_done, u8 query_type) argument
200 ar9003_mci_send_coex_halt_bt_gpm(struct ath_hw *ah, bool halt, bool wait_done) argument
223 ar9003_mci_prep_interface(struct ath_hw *ah) argument
320 ar9003_mci_set_full_sleep(struct ath_hw *ah) argument
333 ar9003_mci_disable_interrupt(struct ath_hw *ah) argument
339 ar9003_mci_enable_interrupt(struct ath_hw *ah) argument
346 ar9003_mci_check_int(struct ath_hw *ah, u32 ints) argument
354 ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr, u32 *rx_msg_intr) argument
368 ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked) argument
393 ar9003_mci_2g5g_changed(struct ath_hw *ah, bool is_2g) argument
404 ar9003_mci_is_gpm_valid(struct ath_hw *ah, u32 msg_index) argument
424 ar9003_mci_observation_set_up(struct ath_hw *ah) argument
464 ar9003_mci_send_coex_bt_flags(struct ath_hw *ah, bool wait_done, u8 opcode, u32 bt_flags) argument
482 ar9003_mci_sync_bt_state(struct ath_hw *ah) argument
502 ar9003_mci_check_bt(struct ath_hw *ah) argument
522 ar9003_mci_process_gpm_extra(struct ath_hw *ah, u8 gpm_type, u8 gpm_opcode, u32 *p_gpm) argument
569 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type, u8 gpm_opcode, int time_out) argument
678 ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan) argument
718 ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan, struct ath9k_hw_cal_data *caldata) argument
772 ar9003_mci_mute_bt(struct ath_hw *ah) argument
793 ar9003_mci_osla_setup(struct ath_hw *ah, bool enable) argument
824 ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g, bool is_full_sleep) argument
952 ar9003_mci_stop_bt(struct ath_hw *ah, bool save_fullsleep) argument
968 ar9003_mci_send_2g5g_status(struct ath_hw *ah, bool wait_done) argument
996 ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header, u32 *payload, bool queue) argument
1045 ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force) argument
1081 ar9003_mci_send_message(struct ath_hw *ah, u8 header, u32 flag, u32 *payload, u8 len, bool wait_done, bool check_bt) argument
1146 ar9003_mci_init_cal_req(struct ath_hw *ah, bool *is_reusable) argument
1169 ar9003_mci_init_cal_done(struct ath_hw *ah) argument
1183 ar9003_mci_setup(struct ath_hw *ah, u32 gpm_addr, void *gpm_buf, u16 len, u32 sched_addr) argument
1197 ar9003_mci_cleanup(struct ath_hw *ah) argument
1205 ar9003_mci_state(struct ath_hw *ah, u32 state_type) argument
1295 ar9003_mci_bt_gain_ctrl(struct ath_hw *ah) argument
1314 ar9003_mci_set_power_awake(struct ath_hw *ah) argument
1348 ar9003_mci_check_gpm_offset(struct ath_hw *ah) argument
1367 ar9003_mci_get_next_gpm_offset(struct ath_hw *ah, bool first, u32 *more) argument
1452 ar9003_mci_set_bt_version(struct ath_hw *ah, u8 major, u8 minor) argument
1464 ar9003_mci_send_wlan_channels(struct ath_hw *ah) argument
1473 ar9003_mci_get_max_txpower(struct ath_hw *ah, u8 ctlmode) argument
[all...]
H A Dbtcoex.c55 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum) argument
57 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
71 if (AR_SREV_9300_20_OR_LATER(ah))
93 void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah) argument
95 struct ath_common *common = ath9k_hw_common(ah);
96 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
106 if (AR_SREV_9300_20_OR_LATER(ah)) {
111 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
115 if (AR_SREV_9285(ah)) {
125 void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah) argument
147 ath9k_hw_btcoex_init_3wire(struct ath_hw *ah) argument
173 ath9k_hw_btcoex_init_mci(struct ath_hw *ah) argument
197 ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah) argument
210 ath9k_hw_btcoex_set_weight(struct ath_hw *ah, u32 bt_weight, u32 wlan_weight, enum ath_stomp_type stomp_type) argument
259 ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah) argument
297 ath9k_hw_btcoex_enable_mci(struct ath_hw *ah) argument
310 ath9k_hw_btcoex_enable(struct ath_hw *ah) argument
337 ath9k_hw_btcoex_disable(struct ath_hw *ah) argument
374 ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah, enum ath_stomp_type stomp_type) argument
402 ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio) argument
[all...]
/drivers/infiniband/hw/mlx5/
H A Dah.c36 struct mlx5_ib_ah *ah)
39 memcpy(ah->av.rgid, &ah_attr->grh.dgid, 16);
40 ah->av.grh_gid_fl = cpu_to_be32(ah_attr->grh.flow_label |
43 ah->av.hop_limit = ah_attr->grh.hop_limit;
44 ah->av.tclass = ah_attr->grh.traffic_class;
47 ah->av.rlid = cpu_to_be16(ah_attr->dlid);
48 ah->av.fl_mlid = ah_attr->src_path_bits & 0x7f;
49 ah->av.stat_rate_sl = (ah_attr->static_rate << 4) | (ah_attr->sl & 0xf);
51 return &ah->ibah;
56 struct mlx5_ib_ah *ah; local
35 create_ib_ah(struct ib_ah_attr *ah_attr, struct mlx5_ib_ah *ah) argument
67 struct mlx5_ib_ah *ah = to_mah(ibah); local
88 mlx5_ib_destroy_ah(struct ib_ah *ah) argument
[all...]
/drivers/net/wireless/ath/
H A Dhw.c120 void *ah = common->ah; local
123 REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
124 id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;
126 REG_WRITE(ah, AR_STA_ID1, id1);
128 REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
129 REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
145 void *ah = common->ah; local
148 REG_WRITE(ah, AR_MIB
[all...]

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