Searched refs:amcc_iobase (Results 1 - 3 of 3) sorted by relevance

/drivers/staging/comedi/drivers/
H A Daddi_apci_1564.c35 unsigned int amcc_iobase; /* base of AMCC I/O registers */ member in struct:apci1564_private
51 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
52 inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);
53 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);
54 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);
57 outl(0x0, devpriv->amcc_iobase + APCI1564_DO_REG);
58 outl(0x0, devpriv->amcc_iobase + APCI1564_DO_INT_CTRL_REG);
61 addi_watchdog_reset(devpriv->amcc_iobase + APCI1564_WDOG_REG);
64 outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
65 outl(0x0, devpriv->amcc_iobase
[all...]
H A Daddi_apci_1032.c46 unsigned long amcc_iobase; /* base of AMCC I/O registers */ member in struct:apci1032_private
248 if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
297 devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
/drivers/staging/comedi/drivers/addi-data/
H A Dhwdrv_apci1564.c25 * devpriv->amcc_iobase Register Map
87 ul_Command1 = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
90 outl(ul_Command1, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
95 outl(0x02, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
96 outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);
97 outl(0x0, devpriv->amcc_iobase + APCI1564_DO_IRQ_REG);
98 outl(0x0, devpriv->amcc_iobase + APCI1564_WDOG_IRQ_REG);
109 outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);
113 outl(data[2], devpriv->amcc_iobase + APCI1564_TIMER_TIMEBASE_REG);
116 outl(data[3], devpriv->amcc_iobase
[all...]

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