/drivers/gpio/ |
H A D | gpio-omap.c | 78 void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable); 84 #define GPIO_INDEX(bank, gpio) (gpio % bank->width) 85 #define GPIO_BIT(bank, gpio) (BIT(GPIO_INDEX(bank, gpio))) 88 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) 91 static int omap_irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) argument 93 return bank 102 omap_set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) argument 120 omap_set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable) argument 138 omap_set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable) argument 154 omap_get_gpio_datain(struct gpio_bank *bank, int offset) argument 161 omap_get_gpio_dataout(struct gpio_bank *bank, int offset) argument 180 omap_gpio_dbck_enable(struct gpio_bank *bank) argument 191 omap_gpio_dbck_disable(struct gpio_bank *bank) argument 215 omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, unsigned debounce) argument 274 omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio) argument 298 omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, unsigned trigger) argument 359 omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) argument 378 omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) argument 381 omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, unsigned trigger) argument 427 omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) argument 448 omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) argument 473 omap_gpio_is_input(struct gpio_bank *bank, int mask) argument 482 struct gpio_bank *bank = omap_irq_data_get_bank(d); local 528 omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) argument 545 omap_clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) argument 550 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) argument 564 omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) argument 586 omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) argument 608 omap_set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) argument 625 omap_set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) argument 648 omap_reset_gpio(struct gpio_bank *bank, int gpio) argument 660 struct gpio_bank *bank = omap_irq_data_get_bank(d); local 668 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); local 695 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); local 726 struct gpio_bank *bank; local 797 struct gpio_bank *bank = omap_irq_data_get_bank(d); local 819 struct gpio_bank *bank = omap_irq_data_get_bank(d); local 827 struct gpio_bank *bank = omap_irq_data_get_bank(d); local 839 struct gpio_bank *bank = omap_irq_data_get_bank(d); local 865 struct gpio_bank *bank = platform_get_drvdata(pdev); local 880 struct gpio_bank *bank = platform_get_drvdata(pdev); local 914 omap_mpuio_init(struct gpio_bank *bank) argument 926 struct gpio_bank *bank; local 941 struct gpio_bank *bank; local 953 struct gpio_bank *bank; local 967 struct gpio_bank *bank; local 981 struct gpio_bank *bank; local 995 struct gpio_bank *bank; local 1006 omap_gpio_show_rev(struct gpio_bank *bank) argument 1021 omap_gpio_mod_init(struct gpio_bank *bank) argument 1053 omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start, unsigned int num) argument 1081 omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) argument 1164 struct gpio_bank *bank; local 1268 struct gpio_bank *bank = platform_get_drvdata(pdev); local 1336 struct gpio_bank *bank = platform_get_drvdata(pdev); local 1447 struct gpio_bank *bank; local 1461 struct gpio_bank *bank; local 1495 omap_gpio_restore_context(struct gpio_bank *bank) argument [all...] |
H A D | gpio-tz1090.c | 28 /* Register offsets from bank base address */ 47 * struct tz1090_gpio_bank - GPIO bank private data 48 * @chip: Generic GPIO chip for GPIO bank 49 * @domain: IRQ domain for GPIO bank (may be NULL) 50 * @reg: Base of registers, offset for this GPIO bank 51 * @irq: IRQ number for GPIO bank 52 * @label: Debug GPIO bank label, used for storage of chip->label 54 * This is the main private data for a GPIO bank. It encapsulates a gpio_chip, 81 * struct tz1090_gpio_bank_info - Temporary registration info for GPIO bank 83 * @node: Device tree node specific to this GPIO bank 93 tz1090_gpio_write(struct tz1090_gpio_bank *bank, unsigned int reg_offs, u32 data) argument 99 tz1090_gpio_read(struct tz1090_gpio_bank *bank, unsigned int reg_offs) argument 106 _tz1090_gpio_clear_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset) argument 117 tz1090_gpio_clear_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset) argument 129 _tz1090_gpio_set_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset) argument 140 tz1090_gpio_set_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset) argument 152 _tz1090_gpio_mod_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset, bool val) argument 166 tz1090_gpio_mod_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset, bool val) argument 178 tz1090_gpio_read_bit(struct tz1090_gpio_bank *bank, unsigned int reg_offs, unsigned int offset) argument 190 struct tz1090_gpio_bank *bank = to_bank(chip); local 199 struct tz1090_gpio_bank *bank = to_bank(chip); local 215 struct tz1090_gpio_bank *bank = to_bank(chip); local 226 struct tz1090_gpio_bank *bank = to_bank(chip); local 233 struct tz1090_gpio_bank *bank = to_bank(chip); local 248 struct tz1090_gpio_bank *bank = to_bank(chip); local 257 struct tz1090_gpio_bank *bank = to_bank(chip); local 273 tz1090_gpio_irq_polarity(struct tz1090_gpio_bank *bank, unsigned int offset, unsigned int polarity) argument 279 tz1090_gpio_irq_type(struct tz1090_gpio_bank *bank, unsigned int offset, unsigned int type) argument 286 tz1090_gpio_irq_next_edge(struct tz1090_gpio_bank *bank, unsigned int offset) argument 322 struct tz1090_gpio_bank *bank = irqd_to_gpio_bank(data); local 365 struct tz1090_gpio_bank *bank = irqd_to_gpio_bank(data); local 382 struct tz1090_gpio_bank *bank; local 411 struct tz1090_gpio_bank *bank; local [all...] |
H A D | gpio-adp5588.c | 70 unsigned bank = ADP5588_BANK(off); local 76 if (dev->dir[bank] & bit) 77 val = dev->dat_out[bank]; 79 val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); 89 unsigned bank, bit; local 93 bank = ADP5588_BANK(off); 98 dev->dat_out[bank] |= bit; 100 dev->dat_out[bank] &= ~bit; 102 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, 103 dev->dat_out[bank]); 110 unsigned bank; local 128 unsigned bank, bit; local 210 unsigned bank, bit; local 257 unsigned status, bank, bit, pending; local [all...] |
H A D | gpio-f7188x.c | 59 struct f7188x_gpio_bank *bank; member in struct:f7188x_gpio_data 171 struct f7188x_gpio_bank *bank = local 173 struct f7188x_sio *sio = bank->data->sio; 181 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); 183 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); 193 struct f7188x_gpio_bank *bank = local 195 struct f7188x_sio *sio = bank->data->sio; 203 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); 206 data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); 208 data = superio_inb(sio->addr, gpio_data_in(bank 219 struct f7188x_gpio_bank *bank = local 248 struct f7188x_gpio_bank *bank = local 301 struct f7188x_gpio_bank *bank = &data->bank[i]; local 319 struct f7188x_gpio_bank *bank = &data->bank[i]; local 332 struct f7188x_gpio_bank *bank = &data->bank[i]; local [all...] |
H A D | gpio-tegra.c | 65 int bank; member in struct:tegra_gpio_bank 96 static int tegra_gpio_compose(int bank, int port, int bit) argument 98 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7); 204 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); local 242 spin_lock_irqsave(&bank->lvl_lock[port], flags); 249 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 271 struct tegra_gpio_bank *bank; local 279 bank = irq_get_handler_data(irq); 282 int gpio = tegra_gpio_compose(bank->bank, por 318 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; local 342 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; local 363 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); local 427 struct tegra_gpio_bank *bank; local [all...] |
/drivers/pinctrl/sh-pfc/ |
H A D | sh_pfc.h | 179 #define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx) 181 #define PORT_GP_32(bank, fn, sfx) \ 182 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \ 183 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \ 184 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, [all...] |
/drivers/crypto/qat/qat_common/ |
H A D | adf_transport_access_macros.h | 115 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ 116 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 118 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ 119 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 121 #define READ_CSR_E_STAT(csr_base_addr, bank) \ 122 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 124 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ 125 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 127 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ 132 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) [all...] |
H A D | adf_transport.c | 80 static int adf_reserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) argument 82 spin_lock(&bank->lock); 83 if (bank->ring_mask & (1 << ring)) { 84 spin_unlock(&bank->lock); 87 bank->ring_mask |= (1 << ring); 88 spin_unlock(&bank->lock); 92 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) argument 94 spin_lock(&bank->lock); 95 bank->ring_mask &= ~(1 << ring); 96 spin_unlock(&bank 99 adf_enable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) argument 109 adf_disable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) argument 181 struct adf_etr_bank_data *bank = ring->bank; local 238 struct adf_etr_bank_data *bank; local 309 struct adf_etr_bank_data *bank = ring->bank; local 327 adf_ring_response_handler(struct adf_etr_bank_data *bank) argument 353 struct adf_etr_bank_data *bank = (void *)bank_addr; local 379 adf_enable_coalesc(struct adf_etr_bank_data *bank, const char *section, uint32_t bank_num_in_accel) argument 392 adf_init_bank(struct adf_accel_dev *accel_dev, struct adf_etr_bank_data *bank, uint32_t bank_num, void __iomem *csr_addr) argument 519 cleanup_bank(struct adf_etr_bank_data *bank) argument [all...] |
H A D | adf_transport_debug.c | 88 struct adf_etr_bank_data *bank = ring->bank; local 90 void __iomem *csr = ring->bank->csr_addr; 96 head = READ_CSR_RING_HEAD(csr, bank->bank_number, 98 tail = READ_CSR_RING_TAIL(csr, bank->bank_number, 100 empty = READ_CSR_E_STAT(csr, bank->bank_number); 103 seq_printf(sfile, "ring num %d, bank num %d\n", 104 ring->ring_number, ring->bank->bank_number); 174 ring->bank->bank_debug_dir, 216 struct adf_etr_bank_data *bank local 276 adf_bank_debugfs_add(struct adf_etr_bank_data *bank) argument 300 adf_bank_debugfs_rm(struct adf_etr_bank_data *bank) argument [all...] |
H A D | adf_transport_internal.h | 65 struct adf_etr_bank_data *bank; member in struct:adf_etr_ring_data 84 spinlock_t lock; /* protects bank data struct */ 98 int adf_bank_debugfs_add(struct adf_etr_bank_data *bank); 99 void adf_bank_debugfs_rm(struct adf_etr_bank_data *bank); 103 static inline int adf_bank_debugfs_add(struct adf_etr_bank_data *bank) argument 108 #define adf_bank_debugfs_rm(bank) do {} while (0)
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/drivers/pinctrl/ |
H A D | pinctrl-rockchip.c | 88 * @reg_base: register base of the gpio bank 90 * @clk: clock of the gpio bank 91 * @irq: interrupt of the gpio bank 93 * @nr_pins: number of pins in this bank 94 * @name: name of the bank 95 * @bank_num: number of the bank, to account for holes 96 * @iomux: array describing the 4 iomux sources of the bank 98 * @of_node: dt node of this bank 100 * @domain: irqdomain of the gpio bank 103 * @slock: spinlock for the gpio bank 379 rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) argument 433 rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) argument 494 rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument 514 rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument 549 rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument 584 rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument 612 rk3288_get_drive(struct rockchip_pin_bank *bank, int pin_num) argument 631 rk3288_set_drive(struct rockchip_pin_bank *bank, int pin_num, int strength) argument 670 rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num) argument 718 rockchip_set_pull(struct rockchip_pin_bank *bank, int pin_num, int pull) argument 825 struct rockchip_pin_bank *bank; local 864 struct rockchip_pin_bank *bank; local 929 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); local 991 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); local 1078 struct rockchip_pin_bank *bank; local 1227 int pin, bank, ret; local 1298 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); local 1320 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); local 1357 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); local 1386 struct rockchip_pin_bank *bank = irq_get_handler_data(irq); local 1447 struct rockchip_pin_bank *bank = gc->private; local 1525 struct rockchip_pin_bank *bank = ctrl->pin_banks; local 1578 struct rockchip_pin_bank *bank = ctrl->pin_banks; local 1624 struct rockchip_pin_bank *bank = ctrl->pin_banks; local 1636 rockchip_get_bank_data(struct rockchip_pin_bank *bank, struct rockchip_pinctrl *info) argument 1700 struct rockchip_pin_bank *bank; local [all...] |
/drivers/dma/ipu/ |
H A D | ipu_irq.c | 75 struct ipu_irq_bank *bank; member in struct:ipu_irq_map 99 struct ipu_irq_bank *bank; local 105 bank = map->bank; 106 if (!bank) { 112 reg = ipu_read_reg(bank->ipu, bank->control); 114 ipu_write_reg(bank->ipu, reg, bank->control); 122 struct ipu_irq_bank *bank; local 145 struct ipu_irq_bank *bank; local 170 struct ipu_irq_bank *bank; local 276 struct ipu_irq_bank *bank = irq_bank + i; local 317 struct ipu_irq_bank *bank = irq_bank + i; local [all...] |
/drivers/hwspinlock/ |
H A D | hwspinlock_internal.h | 44 * @bank: the hwspinlock_device structure which owns this lock 49 struct hwspinlock_device *bank; member in struct:hwspinlock 72 int local_id = hwlock - &hwlock->bank->lock[0]; 74 return hwlock->bank->base_id + local_id;
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H A D | hwspinlock_core.c | 120 ret = hwlock->bank->ops->trylock(hwlock); 202 if (hwlock->bank->ops->relax) 203 hwlock->bank->ops->relax(hwlock); 248 hwlock->bank->ops->unlock(hwlock); 312 * @bank: the hwspinlock device, which usually provides numerous hw locks 315 * @base_id: id of the first hardware spinlock in this bank 325 int hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev, argument 331 if (!bank || !ops || !dev || !num_locks || !ops->trylock || 337 bank->dev = dev; 338 bank 373 hwspin_lock_unregister(struct hwspinlock_device *bank) argument [all...] |
H A D | omap_hwspinlock.c | 84 struct hwspinlock_device *bank; local 132 bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL); 133 if (!bank) { 138 platform_set_drvdata(pdev, bank); 140 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++) 143 ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops, 151 kfree(bank); 160 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local 161 void __iomem *io_base = bank [all...] |
H A D | u8500_hsem.c | 97 struct hwspinlock_device *bank; local 122 bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL); 123 if (!bank) { 128 platform_set_drvdata(pdev, bank); 130 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++) 136 ret = hwspin_lock_register(bank, &pdev->dev, &u8500_hwspinlock_ops, 145 kfree(bank); 153 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local 154 void __iomem *io_base = bank [all...] |
/drivers/pinctrl/samsung/ |
H A D | pinctrl-samsung.c | 343 * given a pin number that is local to a pin controller, find out the pin bank 344 * and the register base of the pin bank. 348 struct samsung_pin_bank **bank) 360 if (bank) 361 *bank = b; 370 struct samsung_pin_bank *bank; local 382 ®, &pin_offset, &bank); 383 type = bank->type; 392 spin_lock_irqsave(&bank->slock, flags); 400 spin_unlock_irqrestore(&bank 346 pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, unsigned pin, void __iomem **reg, u32 *offset, struct samsung_pin_bank **bank) argument 426 struct samsung_pin_bank *bank; local 530 struct samsung_pin_bank *bank = gc_to_pin_bank(gc); local 554 struct samsung_pin_bank *bank = gc_to_pin_bank(gc); local 573 struct samsung_pin_bank *bank; local 627 struct samsung_pin_bank *bank = gc_to_pin_bank(gc); local 828 int pin, bank, ret; local 922 struct samsung_pin_bank *bank = ctrl->pin_banks; local 958 struct samsung_pin_bank *bank = ctrl->pin_banks; local 978 struct samsung_pin_bank *bank; local 1090 struct samsung_pin_bank *bank = &ctrl->pin_banks[i]; local 1141 struct samsung_pin_bank *bank = &ctrl->pin_banks[i]; local [all...] |
H A D | pinctrl-s3c64xx.c | 214 * @bank: pin bank related to the domain 218 struct samsung_pin_bank *bank; member in struct:s3c64xx_eint0_domain_data 273 struct samsung_pin_bank *bank, int pin) 275 struct samsung_pin_bank_type *bank_type = bank->type; 283 reg = d->virt_base + bank->pctl_offset; 286 /* 4-bit bank type with 2 con regs */ 294 spin_lock_irqsave(&bank->slock, flags); 298 val |= bank->eint_func << shift; 301 spin_unlock_irqrestore(&bank 272 s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d, struct samsung_pin_bank *bank, int pin) argument 310 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 336 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 346 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 390 struct samsung_pin_bank *bank = h->host_data; local 460 struct samsung_pin_bank *bank; local 558 struct samsung_pin_bank *bank = ddata->bank; local 669 struct samsung_pin_bank *bank = ddata->bank; local 705 struct samsung_pin_bank *bank; local [all...] |
H A D | pinctrl-s3c24xx.c | 101 * @bank: pin bank related to the domain 106 struct samsung_pin_bank *bank; member in struct:s3c24xx_eint_domain_data 144 struct samsung_pin_bank *bank, int pin) 146 struct samsung_pin_bank_type *bank_type = bank->type; 154 reg = d->virt_base + bank->pctl_offset; 158 spin_lock_irqsave(&bank->slock, flags); 162 val |= bank->eint_func << shift; 165 spin_unlock_irqrestore(&bank->slock, flags); 170 struct samsung_pin_bank *bank local 143 s3c24xx_eint_set_function(struct samsung_pinctrl_drv_data *d, struct samsung_pin_bank *bank, int pin) argument 204 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 215 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 226 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 261 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 270 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 281 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 321 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 330 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 342 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); local 423 struct samsung_pin_bank *bank = ddata->bank; local 453 struct samsung_pin_bank *bank = ddata->bank; local 481 struct samsung_pin_bank *bank; local [all...] |
H A D | pinctrl-exynos.c | 69 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 70 struct samsung_pinctrl_drv_data *d = bank->drvdata; 71 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; 75 spin_lock_irqsave(&bank->slock, flags); 81 spin_unlock_irqrestore(&bank->slock, flags); 88 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 89 struct samsung_pinctrl_drv_data *d = bank->drvdata; 90 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; 99 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 100 struct samsung_pinctrl_drv_data *d = bank 129 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 173 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 212 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 281 struct samsung_pin_bank *bank = ctrl->pin_banks; local 311 struct samsung_pin_bank *bank; local 370 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local 406 struct samsung_pin_bank *bank = eintd->bank; local 485 struct samsung_pin_bank *bank; local 572 exynos_pinctrl_suspend_bank( struct samsung_pinctrl_drv_data *drvdata, struct samsung_pin_bank *bank) argument 594 struct samsung_pin_bank *bank = ctrl->pin_banks; local 602 exynos_pinctrl_resume_bank( struct samsung_pinctrl_drv_data *drvdata, struct samsung_pin_bank *bank) argument 630 struct samsung_pin_bank *bank = ctrl->pin_banks; local [all...] |
/drivers/pinctrl/sunxi/ |
H A D | pinctrl-sunxi.h | 31 #define SUNXI_PINCTRL_PIN(bank, pin) \ 32 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin) 165 * This is for the first bank. Each bank will have the same layout, 173 u8 bank = pin / PINS_PER_BANK; local 174 u32 offset = bank * BANK_MEM_SIZE; 188 u8 bank = pin / PINS_PER_BANK; local 189 u32 offset = bank * BANK_MEM_SIZE; 203 u8 bank local 218 u8 bank = pin / PINS_PER_BANK; local 233 u8 bank = irq / IRQ_PER_BANK; local 245 sunxi_irq_ctrl_reg_from_bank(u8 bank) argument 252 u8 bank = irq / IRQ_PER_BANK; local 263 sunxi_irq_status_reg_from_bank(u8 bank) argument 270 u8 bank = irq / IRQ_PER_BANK; local [all...] |
/drivers/leds/ |
H A D | leds-tca6507.c | 61 * Each bank (BANK0 and BANK1) has two usage counts - LEDs using the 170 struct bank { struct in struct:tca6507_chip 175 } bank[3]; member in struct:tca6507_chip 186 int bank; /* Bank used, or -1 */ member in struct:tca6507_chip::tca6507_led 289 * bank or other. This can be used for timers, for levels, or for 292 static void set_code(struct tca6507_chip *tca, int reg, int bank, int new) argument 296 if (bank) { 309 static void set_level(struct tca6507_chip *tca, int bank, int level) argument 311 switch (bank) { 314 set_code(tca, TCA6507_MAX_INTENSITY, bank, leve 324 set_times(struct tca6507_chip *tca, int bank) argument [all...] |
/drivers/clk/rockchip/ |
H A D | softrst.c | 37 int bank = id / softrst->num_per_reg; local 42 softrst->reg_base + (bank * 4)); 49 reg = readl(softrst->reg_base + (bank * 4)); 50 writel(reg | BIT(offset), softrst->reg_base + (bank * 4)); 64 int bank = id / softrst->num_per_reg; local 68 writel((BIT(offset) << 16), softrst->reg_base + (bank * 4)); 75 reg = readl(softrst->reg_base + (bank * 4)); 76 writel(reg & ~BIT(offset), softrst->reg_base + (bank * 4));
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/drivers/staging/vme/devices/ |
H A D | vme_pio2_gpio.c | 40 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) | 41 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { 59 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH) 65 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH) 78 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) | 79 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { 86 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value | 89 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value & 99 card->bank[PIO2_CHANNEL_BANK[offset]].value = reg; 108 if ((card->bank[PIO2_CHANNEL_BAN [all...] |
/drivers/pinctrl/sirf/ |
H A D | pinctrl-sirf.c | 444 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); local 449 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); 461 struct sirfsoc_gpio_bank *bank, 467 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); 483 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); local 485 __sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE); 492 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); local 497 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); 513 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); local 518 offset = SIRFSOC_GPIO_CTRL(bank 460 __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio, struct sirfsoc_gpio_bank *bank, int idx) argument 574 struct sirfsoc_gpio_bank *bank; local 632 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); local 655 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); local 671 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); local 687 sirfsoc_gpio_set_output(struct sirfsoc_gpio_chip *sgpio, struct sirfsoc_gpio_bank *bank, unsigned offset, int value) argument 714 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); local 733 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); local 750 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); local 804 struct sirfsoc_gpio_bank *bank; local [all...] |